[PATCH] D65504: [AArch64] Do not allocate unnecessary emergency slot.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 31 02:37:35 PDT 2019
sdesmalen created this revision.
sdesmalen added reviewers: gberry, thegameg, mstorsjo, t.p.northover.
Herald added subscribers: kristof.beyls, javed.absar.
Fix an issue where the compiler still allocates an emergency spill slot even
though it already decided to spill an extra callee-save register to use
as a scratch register.
https://reviews.llvm.org/D65504
Files:
lib/Target/AArch64/AArch64FrameLowering.cpp
test/CodeGen/AArch64/extra-callee-save.mir
Index: test/CodeGen/AArch64/extra-callee-save.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AArch64/extra-callee-save.mir
@@ -0,0 +1,34 @@
+#RUN: llc -mtriple=aarch64-- -run-pass prologepilog %s -o - | FileCheck %s
+# Check that we spill a scratch register, but not also an additional
+# emergency spill slot.
+--- |
+
+ ; Function Attrs: nounwind
+ define void @big_stack() nounwind { entry: unreachable }
+
+...
+---
+name: big_stack
+# CHECK-LABEL: name: big_stack
+# CHECK: frame-setup STPXi killed $x20, killed $x19
+# CHECK: $sp = frame-setup SUBXri $sp, 8, 12
+# CHECK-NOT: frame-setup SUBXri $sp, 16, 0
+tracksRegLiveness: true
+stack:
+ - { id: 0, name: '', size: 32761, alignment: 8 }
+body: |
+ bb.0:
+ $x19 = IMPLICIT_DEF
+ ; $x20 can be used as scratch register.
+ $x21 = IMPLICIT_DEF
+ $x22 = IMPLICIT_DEF
+ $x23 = IMPLICIT_DEF
+ $x24 = IMPLICIT_DEF
+ $x25 = IMPLICIT_DEF
+ $x26 = IMPLICIT_DEF
+ $x27 = IMPLICIT_DEF
+ $x28 = IMPLICIT_DEF
+ $lr = IMPLICIT_DEF
+ $fp = IMPLICIT_DEF
+ RET_ReallyLR
+...
Index: lib/Target/AArch64/AArch64FrameLowering.cpp
===================================================================
--- lib/Target/AArch64/AArch64FrameLowering.cpp
+++ lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -2113,7 +2113,7 @@
SavedRegs.set(AArch64::LR);
}
- LLVM_DEBUG(dbgs() << "*** determineCalleeSaves\nUsed CSRs:";
+ LLVM_DEBUG(dbgs() << "*** determineCalleeSaves\nSaved CSRs:";
for (unsigned Reg
: SavedRegs.set_bits()) dbgs()
<< ' ' << printReg(Reg, RegInfo);
@@ -2145,7 +2145,7 @@
// store the pair.
if (produceCompactUnwindFrame(MF))
SavedRegs.set(UnspilledCSGPRPaired);
- ExtraCSSpill = UnspilledCSGPRPaired;
+ ExtraCSSpill = UnspilledCSGPR;
}
// If we didn't find an extra callee-saved register to spill, create
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