[PATCH] D65366: [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri updated this revision to Diff 212297.
lebedev.ri marked 4 inline comments as done.
lebedev.ri added a comment.

Updated:

- Improved test coverage - negative divisors, `INT_MIN` divisors
- Rebased
- Fix review notes


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65366/new/

https://reviews.llvm.org/D65366

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/srem-seteq-optsize.ll
  llvm/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
  llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
  llvm/test/CodeGen/AArch64/srem-seteq.ll
  llvm/test/CodeGen/X86/srem-seteq-optsize.ll
  llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
  llvm/test/CodeGen/X86/srem-seteq-vec-splat.ll
  llvm/test/CodeGen/X86/srem-seteq.ll
  llvm/test/CodeGen/X86/vselect-avx.ll

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