[PATCH] D65412: GlobalISel: Partially implement fewerElementsVector G_UNMERGE_VALUES

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: aemerson, paquette, aditya_nandakumar.
Herald added subscribers: Petar.Avramovic, volkan, tschuett, rovka, nhaehnle, wdng, jvesely.

Odd sized vectors aren't handled yet.


https://reviews.llvm.org/D65412

Files:
  include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir

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