[llvm] r367094 - [ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 26 02:32:21 PDT 2019
Author: rksimon
Date: Fri Jul 26 02:32:21 2019
New Revision: 367094
URL: http://llvm.org/viewvc/llvm-project?rev=367094&view=rev
Log:
[ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks
Modified:
llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll
Modified: llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll?rev=367094&r1=367093&r2=367094&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll Fri Jul 26 02:32:21 2019
@@ -1,15 +1,68 @@
-; RUN: llc -O3 -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s
-; RUN: llc -O3 -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3 -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+; RUN: llc -O3 -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-BE
-; CHECK-UNSUPPORTED-NOT: smlad
-
-; CHECK-LABEL: add_user
-; CHECK: %for.body
-; CHECK: ldr [[A:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: ldr [[B:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: sxtah [[COUNT:r[0-9]+]], [[COUNT]], [[A]]
-; CHECK: smlad [[ACC:r[0-9]+]], [[B]], [[A]], [[ACC]]
define i32 @add_user(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
+; CHECK-LE-LABEL: add_user:
+; CHECK-LE: @ %bb.0: @ %entry
+; CHECK-LE-NEXT: .save {r4, lr}
+; CHECK-LE-NEXT: push {r4, lr}
+; CHECK-LE-NEXT: cmp r0, #1
+; CHECK-LE-NEXT: blt .LBB0_4
+; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-LE-NEXT: subs r2, #2
+; CHECK-LE-NEXT: subs r3, #2
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: .p2align 2
+; CHECK-LE-NEXT: .LBB0_2: @ %for.body
+; CHECK-LE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-LE-NEXT: ldr lr, [r3, #2]!
+; CHECK-LE-NEXT: ldr r4, [r2, #2]!
+; CHECK-LE-NEXT: subs r0, #1
+; CHECK-LE-NEXT: sxtah r1, r1, lr
+; CHECK-LE-NEXT: smlad r12, r4, lr, r12
+; CHECK-LE-NEXT: bne .LBB0_2
+; CHECK-LE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, pc}
+; CHECK-LE-NEXT: .LBB0_4:
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, pc}
+;
+; CHECK-BE-LABEL: add_user:
+; CHECK-BE: @ %bb.0: @ %entry
+; CHECK-BE-NEXT: .save {r4, r5, r6, lr}
+; CHECK-BE-NEXT: push {r4, r5, r6, lr}
+; CHECK-BE-NEXT: cmp r0, #1
+; CHECK-BE-NEXT: blt .LBB0_4
+; CHECK-BE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-BE-NEXT: subs r2, #2
+; CHECK-BE-NEXT: subs r3, #2
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: .p2align 2
+; CHECK-BE-NEXT: .LBB0_2: @ %for.body
+; CHECK-BE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT: ldrsh lr, [r3, #2]!
+; CHECK-BE-NEXT: ldrsh r4, [r2, #2]!
+; CHECK-BE-NEXT: ldrsh.w r5, [r3, #2]
+; CHECK-BE-NEXT: ldrsh.w r6, [r2, #2]
+; CHECK-BE-NEXT: smlabb r4, r4, lr, r12
+; CHECK-BE-NEXT: subs r0, #1
+; CHECK-BE-NEXT: smlabb r12, r6, r5, r4
+; CHECK-BE-NEXT: add r1, lr
+; CHECK-BE-NEXT: bne .LBB0_2
+; CHECK-BE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
+; CHECK-BE-NEXT: .LBB0_4:
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
entry:
%cmp24 = icmp sgt i32 %arg, 0
br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
@@ -51,14 +104,68 @@ for.body:
br i1 %exitcond, label %for.body, label %for.cond.cleanup
}
-; CHECK-LABEL: mul_bottom_user
-; CHECK: %for.body
-; CHECK: ldr [[A:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: ldr [[B:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: sxth [[SXT:r[0-9]+]], [[A]]
-; CHECK: smlad [[ACC:r[0-9]+]], [[B]], [[A]], [[ACC]]
-; CHECK: mul [[COUNT:r[0-9]+]],{{.*}}[[SXT]]
define i32 @mul_bottom_user(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
+; CHECK-LE-LABEL: mul_bottom_user:
+; CHECK-LE: @ %bb.0: @ %entry
+; CHECK-LE-NEXT: .save {r4, r5, r7, lr}
+; CHECK-LE-NEXT: push {r4, r5, r7, lr}
+; CHECK-LE-NEXT: cmp r0, #1
+; CHECK-LE-NEXT: blt .LBB1_4
+; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-LE-NEXT: sub.w lr, r2, #2
+; CHECK-LE-NEXT: subs r3, #2
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: .p2align 2
+; CHECK-LE-NEXT: .LBB1_2: @ %for.body
+; CHECK-LE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-LE-NEXT: ldr r2, [r3, #2]!
+; CHECK-LE-NEXT: ldr r4, [lr, #2]!
+; CHECK-LE-NEXT: sxth r5, r2
+; CHECK-LE-NEXT: smlad r12, r4, r2, r12
+; CHECK-LE-NEXT: subs r0, #1
+; CHECK-LE-NEXT: mul r1, r5, r1
+; CHECK-LE-NEXT: bne .LBB1_2
+; CHECK-LE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+; CHECK-LE-NEXT: .LBB1_4:
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+;
+; CHECK-BE-LABEL: mul_bottom_user:
+; CHECK-BE: @ %bb.0: @ %entry
+; CHECK-BE-NEXT: .save {r4, r5, r6, lr}
+; CHECK-BE-NEXT: push {r4, r5, r6, lr}
+; CHECK-BE-NEXT: cmp r0, #1
+; CHECK-BE-NEXT: blt .LBB1_4
+; CHECK-BE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-BE-NEXT: subs r2, #2
+; CHECK-BE-NEXT: subs r3, #2
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: .p2align 2
+; CHECK-BE-NEXT: .LBB1_2: @ %for.body
+; CHECK-BE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT: ldrsh lr, [r3, #2]!
+; CHECK-BE-NEXT: ldrsh r4, [r2, #2]!
+; CHECK-BE-NEXT: ldrsh.w r5, [r3, #2]
+; CHECK-BE-NEXT: ldrsh.w r6, [r2, #2]
+; CHECK-BE-NEXT: smlabb r4, r4, lr, r12
+; CHECK-BE-NEXT: subs r0, #1
+; CHECK-BE-NEXT: smlabb r12, r6, r5, r4
+; CHECK-BE-NEXT: mul r1, lr, r1
+; CHECK-BE-NEXT: bne .LBB1_2
+; CHECK-BE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
+; CHECK-BE-NEXT: .LBB1_4:
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
entry:
%cmp24 = icmp sgt i32 %arg, 0
br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
@@ -100,14 +207,68 @@ for.body:
br i1 %exitcond, label %for.body, label %for.cond.cleanup
}
-; CHECK-LABEL: mul_top_user
-; CHECK: %for.body
-; CHECK: ldr [[A:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: ldr [[B:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: asrs [[ASR:[rl0-9]+]], [[A]], #16
-; CHECK: smlad [[ACC:[rl0-9]+]], [[A]], [[B]], [[ACC]]
-; CHECK: mul [[COUNT:[rl0-9]+]],{{.}}[[ASR]]
define i32 @mul_top_user(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
+; CHECK-LE-LABEL: mul_top_user:
+; CHECK-LE: @ %bb.0: @ %entry
+; CHECK-LE-NEXT: .save {r4, r5, r7, lr}
+; CHECK-LE-NEXT: push {r4, r5, r7, lr}
+; CHECK-LE-NEXT: cmp r0, #1
+; CHECK-LE-NEXT: blt .LBB2_4
+; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-LE-NEXT: subs r2, #2
+; CHECK-LE-NEXT: subs r3, #2
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: .p2align 2
+; CHECK-LE-NEXT: .LBB2_2: @ %for.body
+; CHECK-LE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-LE-NEXT: ldr r4, [r2, #2]!
+; CHECK-LE-NEXT: ldr lr, [r3, #2]!
+; CHECK-LE-NEXT: asrs r5, r4, #16
+; CHECK-LE-NEXT: smlad r12, r4, lr, r12
+; CHECK-LE-NEXT: subs r0, #1
+; CHECK-LE-NEXT: mul r1, r5, r1
+; CHECK-LE-NEXT: bne .LBB2_2
+; CHECK-LE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+; CHECK-LE-NEXT: .LBB2_4:
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+;
+; CHECK-BE-LABEL: mul_top_user:
+; CHECK-BE: @ %bb.0: @ %entry
+; CHECK-BE-NEXT: .save {r4, r5, r6, lr}
+; CHECK-BE-NEXT: push {r4, r5, r6, lr}
+; CHECK-BE-NEXT: cmp r0, #1
+; CHECK-BE-NEXT: blt .LBB2_4
+; CHECK-BE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-BE-NEXT: subs r2, #2
+; CHECK-BE-NEXT: subs r3, #2
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: .p2align 2
+; CHECK-BE-NEXT: .LBB2_2: @ %for.body
+; CHECK-BE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT: ldrsh lr, [r3, #2]!
+; CHECK-BE-NEXT: ldrsh r4, [r2, #2]!
+; CHECK-BE-NEXT: ldrsh.w r5, [r3, #2]
+; CHECK-BE-NEXT: ldrsh.w r6, [r2, #2]
+; CHECK-BE-NEXT: smlabb r4, r4, lr, r12
+; CHECK-BE-NEXT: subs r0, #1
+; CHECK-BE-NEXT: smlabb r12, r6, r5, r4
+; CHECK-BE-NEXT: mul r1, r6, r1
+; CHECK-BE-NEXT: bne .LBB2_2
+; CHECK-BE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
+; CHECK-BE-NEXT: .LBB2_4:
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
entry:
%cmp24 = icmp sgt i32 %arg, 0
br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
@@ -149,14 +310,69 @@ for.body:
br i1 %exitcond, label %for.body, label %for.cond.cleanup
}
-; CHECK-LABEL: and_user
-; CHECK: %for.body
-; CHECK: ldr [[A:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: ldr [[B:[rl0-9]+]],{{.*}}, #2]!
-; CHECK: uxth [[UXT:r[0-9]+]], [[A]]
-; CHECK: smlad [[ACC:r[0-9]+]], [[B]], [[A]], [[ACC]]
-; CHECK: mul [[MUL:r[0-9]+]],{{.*}}[[UXT]]
define i32 @and_user(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
+; CHECK-LE-LABEL: and_user:
+; CHECK-LE: @ %bb.0: @ %entry
+; CHECK-LE-NEXT: .save {r4, r5, r7, lr}
+; CHECK-LE-NEXT: push {r4, r5, r7, lr}
+; CHECK-LE-NEXT: cmp r0, #1
+; CHECK-LE-NEXT: blt .LBB3_4
+; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-LE-NEXT: sub.w lr, r2, #2
+; CHECK-LE-NEXT: subs r3, #2
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: .p2align 2
+; CHECK-LE-NEXT: .LBB3_2: @ %for.body
+; CHECK-LE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-LE-NEXT: ldr r2, [r3, #2]!
+; CHECK-LE-NEXT: ldr r4, [lr, #2]!
+; CHECK-LE-NEXT: uxth r5, r2
+; CHECK-LE-NEXT: smlad r12, r4, r2, r12
+; CHECK-LE-NEXT: subs r0, #1
+; CHECK-LE-NEXT: mul r1, r5, r1
+; CHECK-LE-NEXT: bne .LBB3_2
+; CHECK-LE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+; CHECK-LE-NEXT: .LBB3_4:
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: movs r1, #0
+; CHECK-LE-NEXT: add.w r0, r12, r1
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+;
+; CHECK-BE-LABEL: and_user:
+; CHECK-BE: @ %bb.0: @ %entry
+; CHECK-BE-NEXT: .save {r4, r5, r6, lr}
+; CHECK-BE-NEXT: push {r4, r5, r6, lr}
+; CHECK-BE-NEXT: cmp r0, #1
+; CHECK-BE-NEXT: blt .LBB3_4
+; CHECK-BE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-BE-NEXT: subs r2, #2
+; CHECK-BE-NEXT: subs r3, #2
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: .p2align 2
+; CHECK-BE-NEXT: .LBB3_2: @ %for.body
+; CHECK-BE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT: ldrsh lr, [r3, #2]!
+; CHECK-BE-NEXT: ldrsh r4, [r2, #2]!
+; CHECK-BE-NEXT: ldrsh.w r5, [r3, #2]
+; CHECK-BE-NEXT: ldrsh.w r6, [r2, #2]
+; CHECK-BE-NEXT: smlabb r4, r4, lr, r12
+; CHECK-BE-NEXT: uxth.w lr, lr
+; CHECK-BE-NEXT: smlabb r12, r6, r5, r4
+; CHECK-BE-NEXT: subs r0, #1
+; CHECK-BE-NEXT: mul r1, lr, r1
+; CHECK-BE-NEXT: bne .LBB3_2
+; CHECK-BE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
+; CHECK-BE-NEXT: .LBB3_4:
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: movs r1, #0
+; CHECK-BE-NEXT: add.w r0, r12, r1
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
entry:
%cmp24 = icmp sgt i32 %arg, 0
br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
@@ -199,16 +415,72 @@ for.body:
br i1 %exitcond, label %for.body, label %for.cond.cleanup
}
-; CHECK-LABEL: multi_uses
-; CHECK: %for.body
-; CHECK: ldr [[A:[rl0-9]+]], [{{.*}}, #2]!
-; CHECK: ldr [[B:[rl0-9]+]], [{{.*}}, #2]!
-; CHECK: sxth [[SXT:r[0-9]+]], [[A]]
-; CHECK: smlad [[ACC:[rl0-9]+]], [[B]], [[A]], [[ACC]]
-; CHECK: eor.w [[EOR:r[0-9]+]], [[SXT]], [[SHIFT:r[0-9]+]]
-; CHECK: muls [[MUL:r[0-9]+]],{{.*}}[[SXT]]
-; CHECK: lsl.w [[SHIFT]], [[MUL]], #16
define i32 @multi_uses(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
+; CHECK-LE-LABEL: multi_uses:
+; CHECK-LE: @ %bb.0: @ %entry
+; CHECK-LE-NEXT: .save {r4, r5, r7, lr}
+; CHECK-LE-NEXT: push {r4, r5, r7, lr}
+; CHECK-LE-NEXT: cmp r0, #1
+; CHECK-LE-NEXT: blt .LBB4_4
+; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-LE-NEXT: subs r2, #2
+; CHECK-LE-NEXT: subs r3, #2
+; CHECK-LE-NEXT: mov.w lr, #0
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: .p2align 2
+; CHECK-LE-NEXT: .LBB4_2: @ %for.body
+; CHECK-LE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-LE-NEXT: ldr r1, [r3, #2]!
+; CHECK-LE-NEXT: ldr r4, [r2, #2]!
+; CHECK-LE-NEXT: sxth r5, r1
+; CHECK-LE-NEXT: smlad lr, r4, r1, lr
+; CHECK-LE-NEXT: eor.w r1, r5, r12
+; CHECK-LE-NEXT: muls r1, r5, r1
+; CHECK-LE-NEXT: subs r0, #1
+; CHECK-LE-NEXT: lsl.w r12, r1, #16
+; CHECK-LE-NEXT: bne .LBB4_2
+; CHECK-LE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-LE-NEXT: add.w r0, lr, r12
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+; CHECK-LE-NEXT: .LBB4_4:
+; CHECK-LE-NEXT: mov.w lr, #0
+; CHECK-LE-NEXT: mov.w r12, #0
+; CHECK-LE-NEXT: add.w r0, lr, r12
+; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
+;
+; CHECK-BE-LABEL: multi_uses:
+; CHECK-BE: @ %bb.0: @ %entry
+; CHECK-BE-NEXT: .save {r4, r5, r6, lr}
+; CHECK-BE-NEXT: push {r4, r5, r6, lr}
+; CHECK-BE-NEXT: cmp r0, #1
+; CHECK-BE-NEXT: blt .LBB4_4
+; CHECK-BE-NEXT: @ %bb.1: @ %for.body.preheader
+; CHECK-BE-NEXT: subs r2, #2
+; CHECK-BE-NEXT: subs r3, #2
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: mov.w lr, #0
+; CHECK-BE-NEXT: .p2align 2
+; CHECK-BE-NEXT: .LBB4_2: @ %for.body
+; CHECK-BE-NEXT: @ =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT: ldrsh r1, [r3, #2]!
+; CHECK-BE-NEXT: ldrsh r4, [r2, #2]!
+; CHECK-BE-NEXT: ldrsh.w r5, [r3, #2]
+; CHECK-BE-NEXT: ldrsh.w r6, [r2, #2]
+; CHECK-BE-NEXT: smlabb r4, r4, r1, r12
+; CHECK-BE-NEXT: subs r0, #1
+; CHECK-BE-NEXT: smlabb r12, r6, r5, r4
+; CHECK-BE-NEXT: eor.w r6, r1, lr
+; CHECK-BE-NEXT: mul r1, r6, r1
+; CHECK-BE-NEXT: lsl.w lr, r1, #16
+; CHECK-BE-NEXT: bne .LBB4_2
+; CHECK-BE-NEXT: @ %bb.3: @ %for.cond.cleanup
+; CHECK-BE-NEXT: add.w r0, r12, lr
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
+; CHECK-BE-NEXT: .LBB4_4:
+; CHECK-BE-NEXT: mov.w r12, #0
+; CHECK-BE-NEXT: mov.w lr, #0
+; CHECK-BE-NEXT: add.w r0, r12, lr
+; CHECK-BE-NEXT: pop {r4, r5, r6, pc}
entry:
%cmp24 = icmp sgt i32 %arg, 0
br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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