[PATCH] D65321: [MIPS GlobalISel] Fix check for void return during lowerCall
Petar Avramovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 26 01:05:55 PDT 2019
Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: atanasyan, petarj.
Herald added subscribers: llvm-commits, jrtc27, arichardson, rovka, sdardis.
Herald added a project: LLVM.
Void return used to have unsigned with value 0 for virtual register
but with addition of Register class and changes to arguments to lowerCall
this is no longer valid.
Check for void return by inspecting the Ty field in OrigRet.
Repository:
rL LLVM
https://reviews.llvm.org/D65321
Files:
lib/Target/Mips/MipsCallLowering.cpp
test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
Index: test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
===================================================================
--- test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
+++ test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
@@ -167,3 +167,27 @@
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dest, i8* align 1 %src, i32 %length, i1 false)
ret void
}
+
+declare void @f_with_void_ret();
+
+define void @call_f_with_void_ret() {
+ ; MIPS32-LABEL: name: call_f_with_void_ret
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: JAL @f_with_void_ret, csr_o32, implicit-def $ra, implicit-def $sp
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: RetRA
+ ; MIPS32_PIC-LABEL: name: call_f_with_void_ret
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $t9, $v0
+ ; MIPS32_PIC: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
+ ; MIPS32_PIC: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: [[GV:%[0-9]+]]:gpr32(p0) = G_GLOBAL_VALUE target-flags(mips-got-call) @f_with_void_ret
+ ; MIPS32_PIC: $gp = COPY [[ADDu]]
+ ; MIPS32_PIC: JALRPseudo [[GV]](p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit-def $gp
+ ; MIPS32_PIC: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: RetRA
+entry:
+ call void @f_with_void_ret()
+ ret void
+}
Index: lib/Target/Mips/MipsCallLowering.cpp
===================================================================
--- lib/Target/Mips/MipsCallLowering.cpp
+++ lib/Target/Mips/MipsCallLowering.cpp
@@ -514,7 +514,7 @@
return false;
}
- if (OrigRet.Regs[0] && !isSupportedType(OrigRet.Ty))
+ if (!OrigRet.Ty->isVoidTy() && !isSupportedType(OrigRet.Ty))
return false;
MachineFunction &MF = MIRBuilder.getMF();
@@ -599,7 +599,7 @@
*STI.getRegBankInfo());
}
- if (OrigRet.Regs[0]) {
+ if (!OrigRet.Ty->isVoidTy()) {
ArgInfos.clear();
SmallVector<unsigned, 8> OrigRetIndices;
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