[PATCH] D63738: [AIX]Enable lowering of MCSymbol MachineOperand
Xiangling Liao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 25 07:40:30 PDT 2019
Xiangling_L updated this revision to Diff 211750.
Xiangling_L added a comment.
Add "return TextSection" in `TargetLoweringObjectFileXCOFF::SelectSectionForGlobal`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63738/new/
https://reviews.llvm.org/D63738
Files:
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
llvm/test/CodeGen/PowerPC/test_call_aix.ll
Index: llvm/test/CodeGen/PowerPC/test_call_aix.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/test_call_aix.ll
+++ llvm/test/CodeGen/PowerPC/test_call_aix.ll
@@ -4,6 +4,9 @@
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp < %s | \
; RUN: FileCheck --check-prefix=64BIT %s
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+
declare void @foo(...)
define void @test_call() {
@@ -16,6 +19,10 @@
; 64BIT: BL8_NOP <mcsymbol .foo>, csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1
; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+; CHECK-LABEL: test_call
+; CHECK: bl .foo
+; CHECK-NEXT: nop
+
call void bitcast (void (...)* @foo to void ()*)()
ret void
}
@@ -35,6 +42,10 @@
; 64BIT: BL8 <mcsymbol .foo_local>, csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x2, implicit-def $r1
; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+; CHECK-LABEL: test_local_call
+; CHECK: bl .foo_local
+; CHECK-NOT: nop
+
call void @foo_local()
ret void
}
Index: llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
+++ llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -193,6 +193,9 @@
OutMO = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP,
isDarwin);
return true;
+ case MachineOperand::MO_MCSymbol:
+ OutMO = GetSymbolRef(MO, MO.getMCSymbol(), AP, isDarwin);
+ return true;
case MachineOperand::MO_RegisterMask:
return false;
}
Index: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -781,9 +781,12 @@
bool isPPC64 = Subtarget.isPPC64();
// Get the ABI.
bool isSVR4ABI = Subtarget.isSVR4ABI();
+ bool isAIXABI = Subtarget.isAIXABI();
bool isELFv2ABI = Subtarget.isELFv2ABI();
- assert((Subtarget.isDarwinABI() || isSVR4ABI) &&
- "Currently only Darwin and SVR4 ABIs are supported for PowerPC.");
+
+ assert((Subtarget.isDarwinABI() || isSVR4ABI || isAIXABI) &&
+ "Currently only Darwin, SVR4 and AIX ABIs are supported for "
+ "PowerPC.");
// Scan the prolog, looking for an UPDATE_VRSAVE instruction. If we find it,
// process it.
Index: llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
===================================================================
--- llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -1843,6 +1843,9 @@
Kind, /* BeginSymbolName */ nullptr);
}
+ if (Kind.isText())
+ return TextSection;
+
report_fatal_error("XCOFF other section types not yet implemented.");
}
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