[PATCH] D65275: [ARM][LowOverheadLoops] Add CPSR defs
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 25 06:01:49 PDT 2019
SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.
Looks like a sensible fix to me, just one question/nit inline.
================
Comment at: lib/Target/ARM/ARMInstrThumb2.td:5226
(ins rGPR:$elts, brtarget:$target),
- 4, IIC_Br, []>,
+ 8, IIC_Br, []>,
Sched<[WriteBr]>;
----------------
Instruction sizes: is that something we can, or actually want to test? I don't think I have seen tests for thhat, but was just wondering it because you're changing it here. If there's no precedent for it, perhaps just a comment that we assume that this expands to 2 instructions?
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https://reviews.llvm.org/D65275/new/
https://reviews.llvm.org/D65275
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