[llvm] r366995 - [PowerPC][NFC] Make `getDefMIPostRA` public
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 25 01:36:44 PDT 2019
Author: lkail
Date: Thu Jul 25 01:36:44 2019
New Revision: 366995
URL: http://llvm.org/viewvc/llvm-project?rev=366995&view=rev
Log:
[PowerPC][NFC] Make `getDefMIPostRA` public
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h?rev=366995&r1=366994&r2=366995&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h Thu Jul 25 01:36:44 2019
@@ -140,11 +140,6 @@ class PPCInstrInfo : public PPCGenInstrI
unsigned &OpNoForForwarding,
bool &SeenIntermediateUse) const;
- // In PostRA phase, try to find instruction defines \p Reg before \p MI.
- // \p SeenIntermediate is set to true if uses between DefMI and \p MI exist.
- MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI,
- bool &SeenIntermediateUse) const;
-
// Can the user MI have it's source at index \p OpNoForForwarding
// forwarded from an add-immediate that feeds it?
bool isUseMIElgibleForForwarding(MachineInstr &MI, const ImmInstrInfo &III,
@@ -447,6 +442,11 @@ public:
bool instrHasImmForm(unsigned Opc, bool IsVFReg, ImmInstrInfo &III,
bool PostRA) const;
+ // In PostRA phase, try to find instruction defines \p Reg before \p MI.
+ // \p SeenIntermediate is set to true if uses between DefMI and \p MI exist.
+ MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI,
+ bool &SeenIntermediateUse) const;
+
/// getRegNumForOperand - some operands use different numbering schemes
/// for the same registers. For example, a VSX instruction may have any of
/// vs0-vs63 allocated whereas an Altivec instruction could only have
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