[PATCH] D65131: [PowerPC][NFC] Added `getDefMIPostRA` method so that other methods don't need to implement it repeatedly
Kai Luo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 25 00:47:52 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL366990: [PowerPC][NFC] Added `getDefMIPostRA` method (authored by lkail, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D65131?vs=211249&id=211680#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D65131/new/
https://reviews.llvm.org/D65131
Files:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
Index: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
@@ -140,6 +140,11 @@
unsigned &OpNoForForwarding,
bool &SeenIntermediateUse) const;
+ // In PostRA phase, try to find instruction defines \p Reg before \p MI.
+ // \p SeenIntermediate is set to true if uses between DefMI and \p MI exist.
+ MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI,
+ bool &SeenIntermediateUse) const;
+
// Can the user MI have it's source at index \p OpNoForForwarding
// forwarded from an add-immediate that feeds it?
bool isUseMIElgibleForForwarding(MachineInstr &MI, const ImmInstrInfo &III,
Index: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2328,6 +2328,23 @@
.addImm(LII.Imm);
}
+MachineInstr *PPCInstrInfo::getDefMIPostRA(unsigned Reg, MachineInstr &MI,
+ bool &SeenIntermediateUse) const {
+ assert(!MI.getParent()->getParent()->getRegInfo().isSSA() &&
+ "Should be called after register allocation.");
+ const TargetRegisterInfo *TRI = &getRegisterInfo();
+ MachineBasicBlock::reverse_iterator E = MI.getParent()->rend(), It = MI;
+ It++;
+ SeenIntermediateUse = false;
+ for (; It != E; ++It) {
+ if (It->modifiesRegister(Reg, TRI))
+ return &*It;
+ if (It->readsRegister(Reg, TRI))
+ SeenIntermediateUse = true;
+ }
+ return nullptr;
+}
+
MachineInstr *PPCInstrInfo::getForwardingDefMI(
MachineInstr &MI,
unsigned &OpNoForForwarding,
@@ -2384,29 +2401,24 @@
MachineOperand &MO = MI.getOperand(i);
SeenIntermediateUse = false;
if (MO.isReg() && MO.isUse() && !MO.isImplicit()) {
- MachineBasicBlock::reverse_iterator E = MI.getParent()->rend(), It = MI;
- It++;
unsigned Reg = MI.getOperand(i).getReg();
-
- // Is this register defined by some form of add-immediate (including
- // load-immediate) within this basic block?
- for ( ; It != E; ++It) {
- if (It->modifiesRegister(Reg, &getRegisterInfo())) {
- switch (It->getOpcode()) {
- default: break;
- case PPC::LI:
- case PPC::LI8:
- case PPC::ADDItocL:
- case PPC::ADDI:
- case PPC::ADDI8:
- OpNoForForwarding = i;
- return &*It;
- }
+ // If we see another use of this reg between the def and the MI,
+ // we want to flat it so the def isn't deleted.
+ MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse);
+ if (DefMI) {
+ // Is this register defined by some form of add-immediate (including
+ // load-immediate) within this basic block?
+ switch (DefMI->getOpcode()) {
+ default:
break;
- } else if (It->readsRegister(Reg, &getRegisterInfo()))
- // If we see another use of this reg between the def and the MI,
- // we want to flat it so the def isn't deleted.
- SeenIntermediateUse = true;
+ case PPC::LI:
+ case PPC::LI8:
+ case PPC::ADDItocL:
+ case PPC::ADDI:
+ case PPC::ADDI8:
+ OpNoForForwarding = i;
+ return DefMI;
+ }
}
}
}
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D65131.211680.patch
Type: text/x-patch
Size: 3656 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190725/fba90d2b/attachment.bin>
More information about the llvm-commits
mailing list