[PATCH] D65205: [RISCV] Add Custom Parser for Atomic Memory Operands

[James Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Yeah this looks like a nice way to do it, better than making an `InstAlias` for each one. GNU as will accept any expression that evaluates to the constant 0 in place of the 0 (i.e. it's just an imm0, same logic as all the other [su]immX fields, other than discarding it). Could we not therefore reuse part of the generic parser, just with a tweak to drop the immediate if parsed and 0? Something like:

  // Attempt to parse token as a register.
  if (parseRegister(Operands, true) == MatchOperand_Success)
    return false;
  
  // Attempt to parse token as an immediate
  if (parseImmediate(Operands) == MatchOperand_Success) {
    // Discard immediate and check it evaluates to 0
    std::unique_ptr<RISCVOperand> ImmOp = Operands.pop_back_val();
    int64_t Imm;
    RISCVMCExpr::VariantKind VK;
    bool IsConstantImm = evaluateConstantImm(ImmOp->getImm(), Imm, VK);
    if (!IsConstantImm || Imm != 0)
      return Error(ImmOp->getStartLoc(), "immediate must be zero");
    // Parse memory base register if present
    if (getLexer().is(AsmToken::LParen))
      return parseMemOpBaseReg(Operands) != MatchOperand_Success;
    return false;
  }
  
  // Finally we have exhausted all options and must declare defeat.
  Error(getLoc(), "unknown operand");
  return true;

You could avoid the pushing and subsequent popping from the vector if you also split `RISCVAsmParser::parseImmediate` (and thus also `RISCVAsmParser::parseOperandWithModifier`) up into everything but the pushing.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D65205/new/

https://reviews.llvm.org/D65205