[llvm] r366808 - Fix MSVC warning about extending a uint32_t shift result to uint64_t. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Tue Jul 23 07:04:54 2019
New Revision: 366808

URL: http://llvm.org/viewvc/llvm-project?rev=366808&view=rev
Log:
Fix MSVC warning about extending a uint32_t shift result to uint64_t. NFCI.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp?rev=366808&r1=366807&r2=366808&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Tue Jul 23 07:04:54 2019
@@ -4502,9 +4502,9 @@ void AMDGPUTargetLowering::computeKnownB
         Known.One |= ((LHSKnown.One.getZExtValue() >> SelBits) & 0xff) << I;
         Known.Zero |= ((LHSKnown.Zero.getZExtValue() >> SelBits) & 0xff) << I;
       } else if (SelBits == 0x0c) {
-        Known.Zero |= 0xff << I;
+        Known.Zero |= 0xFFull << I;
       } else if (SelBits > 0x0c) {
-        Known.One |= 0xff << I;
+        Known.One |= 0xFFull << I;
       }
       Sel >>= 8;
     }