[PATCH] D65113: AMDGPU: Correct behavior of f16/i16 non-format store intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

This was switching to use a format store for a non-format store for
f16 types. Also fixes i16/f16 stores on targets without legal f16.

      

The corresponding loads also need to be fixed.


https://reviews.llvm.org/D65113

Files:
  lib/Target/AMDGPU/BUFInstructions.td
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D65113.211185.patch
Type: text/x-patch
Size: 15614 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190722/51f4f91e/attachment.bin>