[PATCH] D65084: AMDGPU/GlobalISel: Remove manual store select code
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 22 07:26:27 PDT 2019
arsenm added a comment.
In D65084#1595678 <https://reviews.llvm.org/D65084#1595678>, @arsenm wrote:
> In D65084#1595659 <https://reviews.llvm.org/D65084#1595659>, @tstellar wrote:
>
> > Which types are regressed?
>
>
> Types like s128, or v4s16. I'm considering adding dedicated VT-sized types to TableGen to ignore the type and only match the size to avoid needing to list all of these types
Actually, this fixes v4s16. It will break other types we still let through, like v16s8. I think eventually we'll need to bitcast some loads in a step after D64899 <https://reviews.llvm.org/D64899> (or at least for stores)
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D65084/new/
https://reviews.llvm.org/D65084
More information about the llvm-commits
mailing list