[llvm] r366684 - [ARM] Fix for MVE VPT block pass

David Green via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 22 05:51:38 PDT 2019


Author: dmgreen
Date: Mon Jul 22 05:51:38 2019
New Revision: 366684

URL: http://llvm.org/viewvc/llvm-project?rev=366684&view=rev
Log:
[ARM] Fix for MVE VPT block pass

We need to ensure that the number of T's is correct when adding multiple
instructions into the same VPT block.

Differential revision: https://reviews.llvm.org/D65049

Modified:
    llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
    llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir
    llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir
    llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir
    llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir

Modified: llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp?rev=366684&r1=366683&r2=366684&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp Mon Jul 22 05:51:38 2019
@@ -388,8 +388,6 @@ bool MVEVPTBlock::InsertVPTBlocks(Machin
 
     MachineInstrBuilder MIBuilder =
         BuildMI(Block, MBIter, dl, TII->get(ARM::MVE_VPST));
-    // The mask value for the VPST instruction is T = 0b1000 = 8
-    MIBuilder.addImm(VPTMaskValue::T);
 
     MachineBasicBlock::iterator VPSTInsertPos = MIBuilder.getInstr();
     int VPTInstCnt = 1;
@@ -400,12 +398,29 @@ bool MVEVPTBlock::InsertVPTBlocks(Machin
       NextPred = getVPTInstrPredicate(*MBIter, PredReg);
     } while (NextPred != ARMVCC::None && NextPred == Pred && ++VPTInstCnt < 4);
 
+    switch (VPTInstCnt) {
+    case 1:
+      MIBuilder.addImm(VPTMaskValue::T);
+      break;
+    case 2:
+      MIBuilder.addImm(VPTMaskValue::TT);
+      break;
+    case 3:
+      MIBuilder.addImm(VPTMaskValue::TTT);
+      break;
+    case 4:
+      MIBuilder.addImm(VPTMaskValue::TTTT);
+      break;
+    default:
+      llvm_unreachable("Unexpected number of instruction in a VPT block");
+    };
+
     MachineInstr *LastMI = &*MBIter;
     finalizeBundle(Block, VPSTInsertPos.getInstrIterator(),
                    ++LastMI->getIterator());
 
     Modified = true;
-    LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump(););
+    LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump());
 
     ++MBIter;
   }

Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir?rev=366684&r1=366683&r2=366684&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir Mon Jul 22 05:51:38 2019
@@ -64,7 +64,7 @@ body:             |
   bb.0.entry:
     liveins: $q0, $q1, $q2, $q3, $r0
 
-    ; CHECK:       MVE_VPST 8, implicit-def $p0
+    ; CHECK:       MVE_VPST 4, implicit-def $p0
     ; CHECK-NEXT:  renamable $q0 = nnan ninf nsz MVE_VMINNMf32
     ; CHECK-NEXT:  renamable $q1 = nnan ninf nsz MVE_VMINNMf32
 

Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir?rev=366684&r1=366683&r2=366684&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir Mon Jul 22 05:51:38 2019
@@ -65,7 +65,7 @@ body:             |
   bb.0.entry:
     liveins: $q0, $q1, $q2, $q3, $r0
 
-    ; CHECK:       MVE_VPST 8, implicit-def $p0
+    ; CHECK:       MVE_VPST 1, implicit-def $p0
     ; CHECK-NEXT:  renamable $q2 = nnan ninf nsz MVE_VMINNMf32
     ; CHECK-NEXT:  renamable $q2 = nnan ninf nsz MVE_VMINNMf32
     ; CHECK-NEXT:  renamable $q0 = nnan ninf nsz MVE_VMINNMf32

Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir?rev=366684&r1=366683&r2=366684&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir Mon Jul 22 05:51:38 2019
@@ -66,7 +66,7 @@ body:             |
   bb.0.entry:
     liveins: $q0, $q1, $q2, $q3, $r0
 
-    ; CHECK:       MVE_VPST 8, implicit-def $p0
+    ; CHECK:       MVE_VPST 1, implicit-def $p0
     ; CHECK-NEXT:  renamable $q2 = nnan ninf nsz MVE_VMINNMf32
     ; CHECK-NEXT:  renamable $q2 = nnan ninf nsz MVE_VMINNMf32
     ; CHECK-NEXT:  renamable $q0 = nnan ninf nsz MVE_VMINNMf32

Modified: llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir?rev=366684&r1=366683&r2=366684&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir (original)
+++ llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir Mon Jul 22 05:51:38 2019
@@ -64,13 +64,13 @@ body:             |
     liveins: $q0, $q1, $q2, $r0
 
     ; CHECK:       BUNDLE {{.*}} {
-    ; CHECK-NEXT:    MVE_VPST 8, implicit-def $p0
+    ; CHECK-NEXT:    MVE_VPST 4, implicit-def $p0
     ; CHECK-NEXT:    renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
     ; CHECK-NEXT:    renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1
     ; CHECK-NEXT:    $q3 = MVE_VORR $q0, $q0, 0, $noreg, internal undef $q3
     ; CHECK-NEXT:  }
     ; CHECK-NEXT:  BUNDLE {{.*}} {
-    ; CHECK-NEXT:    MVE_VPST 8, implicit-def $p0
+    ; CHECK-NEXT:    MVE_VPST 4, implicit-def $p0
     ; CHECK-NEXT:    renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3
     ; CHECK-NEXT:    renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0
     ; CHECK-NEXT:    tBX_RET 14, $noreg, implicit internal $q0




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