[llvm] r366680 - AMDGPU/GlobalISel: Fix tests without asserts
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 22 05:43:41 PDT 2019
Author: arsenm
Date: Mon Jul 22 05:43:41 2019
New Revision: 366680
URL: http://llvm.org/viewvc/llvm-project?rev=366680&view=rev
Log:
AMDGPU/GlobalISel: Fix tests without asserts
The legality check is only done under NDEBUG, so the failure cases are
different in a release build.
Added:
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
Modified:
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir?rev=366680&r1=366679&r2=366680&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir Mon Jul 22 05:43:41 2019
@@ -1,7 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
-# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
-# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
---
@@ -33,42 +31,6 @@ body: |
; GFX7: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX8-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_on
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX9-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_on
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -137,42 +99,6 @@ body: |
; GFX7: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX8-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_off
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX9-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_off
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -208,101 +134,3 @@ body: |
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
-
----
-name: fmaxnum_ieee_f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fmaxnum_ieee_f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(s16) = G_FMAXNUM_IEEE [[TRUNC]], [[TRUNC1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](s16)
- ; GFX8-LABEL: name: fmaxnum_ieee_f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- ; GFX9-LABEL: name: fmaxnum_ieee_f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FMAXNUM_IEEE %2, %3
- S_ENDPGM 0, implicit %4
-...
-
----
-name: fmaxnum_ieee_v2f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $sgpr0, $sgpr1
-
- ; GFX7-LABEL: name: fmaxnum_ieee_v2f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX7: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](<2 x s16>)
- ; GFX8-LABEL: name: fmaxnum_ieee_v2f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX8: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX8: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](<2 x s16>)
- ; GFX9-LABEL: name: fmaxnum_ieee_v2f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX9: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX9: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](<2 x s16>)
- %0:vgpr(<2 x s16>) = COPY $vgpr0
- %1:vgpr(<2 x s16>) = COPY $vgpr1
- %2:vgpr(<2 x s16>) = G_FMAXNUM_IEEE %0, %1
- S_ENDPGM 0, implicit %2
-...
-
----
-name: fmaxnum_ieee_f16_v_fneg_v
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fmaxnum_ieee_f16_v_fneg_v
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC1]]
- ; GFX7: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(s16) = G_FMAXNUM_IEEE [[TRUNC]], [[FNEG]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](s16)
- ; GFX8-LABEL: name: fmaxnum_ieee_f16_v_fneg_v
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- ; GFX9-LABEL: name: fmaxnum_ieee_f16_v_fneg_v
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FNEG %3
- %5:vgpr(s16) = G_FMAXNUM_IEEE %2, %4
- S_ENDPGM 0, implicit %5
-...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,48 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: fmaxnum_ieee_f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fmaxnum_ieee_f16_vv
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FMAXNUM_IEEE %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+name: fmaxnum_ieee_f16_v_fneg_v
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fmaxnum_ieee_f16_v_fneg_v
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FNEG %3
+ %5:vgpr(s16) = G_FMAXNUM_IEEE %2, %4
+ S_ENDPGM 0, implicit %5
+...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,21 @@
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
+
+---
+name: fmaxnum_ieee_v2f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GFX9-LABEL: name: fmaxnum_ieee_v2f16_vv
+ ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
+ ; GFX9: [[FMAXNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM_IEEE [[COPY]], [[COPY1]]
+ ; GFX9: S_ENDPGM 0, implicit [[FMAXNUM_IEEE]](<2 x s16>)
+ %0:vgpr(<2 x s16>) = COPY $vgpr0
+ %1:vgpr(<2 x s16>) = COPY $vgpr1
+ %2:vgpr(<2 x s16>) = G_FMAXNUM_IEEE %0, %1
+ S_ENDPGM 0, implicit %2
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir?rev=366680&r1=366679&r2=366680&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir Mon Jul 22 05:43:41 2019
@@ -1,7 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
-# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
-# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
# FIXME: Ideally this would fail to select with ieee mode enabled.
---
@@ -34,42 +32,6 @@ body: |
; GFX7: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX8-LABEL: name: fmaxnum_f32_f64_ieee_mode_on
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX9-LABEL: name: fmaxnum_f32_f64_ieee_mode_on
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -136,42 +98,6 @@ body: |
; GFX7: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX8-LABEL: name: fmaxnum_f32_f64_ieee_mode_off
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
- ; GFX9-LABEL: name: fmaxnum_f32_f64_ieee_mode_off
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MAX_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_1:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MAX_F64_2:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F64_]], implicit [[V_MAX_F64_1]], implicit [[V_MAX_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -207,101 +133,3 @@ body: |
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
-
----
-name: fmaxnum_f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fmaxnum_f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FMAXNUM:%[0-9]+]]:vgpr(s16) = G_FMAXNUM [[TRUNC]], [[TRUNC1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM]](s16)
- ; GFX8-LABEL: name: fmaxnum_f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- ; GFX9-LABEL: name: fmaxnum_f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FMAXNUM %2, %3
- S_ENDPGM 0, implicit %4
-...
-
----
-name: fmaxnum_v2f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $sgpr0, $sgpr1
-
- ; GFX7-LABEL: name: fmaxnum_v2f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX7: [[FMAXNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM [[COPY]], [[COPY1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM]](<2 x s16>)
- ; GFX8-LABEL: name: fmaxnum_v2f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX8: [[FMAXNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM [[COPY]], [[COPY1]]
- ; GFX8: S_ENDPGM 0, implicit [[FMAXNUM]](<2 x s16>)
- ; GFX9-LABEL: name: fmaxnum_v2f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX9: [[FMAXNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM [[COPY]], [[COPY1]]
- ; GFX9: S_ENDPGM 0, implicit [[FMAXNUM]](<2 x s16>)
- %0:vgpr(<2 x s16>) = COPY $vgpr0
- %1:vgpr(<2 x s16>) = COPY $vgpr1
- %2:vgpr(<2 x s16>) = G_FMAXNUM %0, %1
- S_ENDPGM 0, implicit %2
-...
-
----
-name: fmaxnum_f16_v_fneg_v
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fmaxnum_f16_v_fneg_v
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC1]]
- ; GFX7: [[FMAXNUM:%[0-9]+]]:vgpr(s16) = G_FMAXNUM [[TRUNC]], [[FNEG]]
- ; GFX7: S_ENDPGM 0, implicit [[FMAXNUM]](s16)
- ; GFX8-LABEL: name: fmaxnum_f16_v_fneg_v
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- ; GFX9-LABEL: name: fmaxnum_f16_v_fneg_v
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FNEG %3
- %5:vgpr(s16) = G_FMAXNUM %2, %4
- S_ENDPGM 0, implicit %5
-...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,48 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: fmaxnum_f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fmaxnum_f16_vv
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FMAXNUM %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+name: fmaxnum_f16_v_fneg_v
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fmaxnum_f16_v_fneg_v
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FNEG %3
+ %5:vgpr(s16) = G_FMAXNUM %2, %4
+ S_ENDPGM 0, implicit %5
+...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,22 @@
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
+# FIXME: Ideally this would fail to select with ieee mode enabled.
+
+---
+name: fmaxnum_v2f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GFX9-LABEL: name: fmaxnum_v2f16_vv
+ ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
+ ; GFX9: [[FMAXNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMAXNUM [[COPY]], [[COPY1]]
+ ; GFX9: S_ENDPGM 0, implicit [[FMAXNUM]](<2 x s16>)
+ %0:vgpr(<2 x s16>) = COPY $vgpr0
+ %1:vgpr(<2 x s16>) = COPY $vgpr1
+ %2:vgpr(<2 x s16>) = G_FMAXNUM %0, %1
+ S_ENDPGM 0, implicit %2
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir?rev=366680&r1=366679&r2=366680&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir Mon Jul 22 05:43:41 2019
@@ -1,7 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
-# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
-# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
---
@@ -33,42 +31,6 @@ body: |
; GFX7: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX8-LABEL: name: fminnum_ieee_f32_f64_ieee_mode_on
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX9-LABEL: name: fminnum_ieee_f32_f64_ieee_mode_on
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -137,42 +99,6 @@ body: |
; GFX7: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX8-LABEL: name: fminnum_ieee_f32_f64_ieee_mode_off
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX9-LABEL: name: fminnum_ieee_f32_f64_ieee_mode_off
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -208,101 +134,3 @@ body: |
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
-
----
-name: fminnum_ieee_f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fminnum_ieee_f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(s16) = G_FMINNUM_IEEE [[TRUNC]], [[TRUNC1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](s16)
- ; GFX8-LABEL: name: fminnum_ieee_f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- ; GFX9-LABEL: name: fminnum_ieee_f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FMINNUM_IEEE %2, %3
- S_ENDPGM 0, implicit %4
-...
-
----
-name: fminnum_ieee_v2f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $sgpr0, $sgpr1
-
- ; GFX7-LABEL: name: fminnum_ieee_v2f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX7: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](<2 x s16>)
- ; GFX8-LABEL: name: fminnum_ieee_v2f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX8: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX8: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](<2 x s16>)
- ; GFX9-LABEL: name: fminnum_ieee_v2f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM_IEEE [[COPY]], [[COPY1]]
- ; GFX9: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](<2 x s16>)
- %0:vgpr(<2 x s16>) = COPY $vgpr0
- %1:vgpr(<2 x s16>) = COPY $vgpr1
- %2:vgpr(<2 x s16>) = G_FMINNUM_IEEE %0, %1
- S_ENDPGM 0, implicit %2
-...
-
----
-name: fminnum_ieee_f16_v_fneg_v
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fminnum_ieee_f16_v_fneg_v
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC1]]
- ; GFX7: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(s16) = G_FMINNUM_IEEE [[TRUNC]], [[FNEG]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](s16)
- ; GFX8-LABEL: name: fminnum_ieee_f16_v_fneg_v
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- ; GFX9-LABEL: name: fminnum_ieee_f16_v_fneg_v
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FNEG %3
- %5:vgpr(s16) = G_FMINNUM_IEEE %2, %4
- S_ENDPGM 0, implicit %5
-...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,48 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: fminnum_ieee_f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fminnum_ieee_f16_vv
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FMINNUM_IEEE %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+name: fminnum_ieee_f16_v_fneg_v
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fminnum_ieee_f16_v_fneg_v
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FNEG %3
+ %5:vgpr(s16) = G_FMINNUM_IEEE %2, %4
+ S_ENDPGM 0, implicit %5
+...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,22 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+
+---
+name: fminnum_ieee_v2f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GFX9-LABEL: name: fminnum_ieee_v2f16_vv
+ ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
+ ; GFX9: [[FMINNUM_IEEE:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM_IEEE [[COPY]], [[COPY1]]
+ ; GFX9: S_ENDPGM 0, implicit [[FMINNUM_IEEE]](<2 x s16>)
+ %0:vgpr(<2 x s16>) = COPY $vgpr0
+ %1:vgpr(<2 x s16>) = COPY $vgpr1
+ %2:vgpr(<2 x s16>) = G_FMINNUM_IEEE %0, %1
+ S_ENDPGM 0, implicit %2
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir?rev=366680&r1=366679&r2=366680&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir Mon Jul 22 05:43:41 2019
@@ -1,7 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
-# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
-# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
# FIXME: Ideally this would fail to select with ieee mode enabled.
---
@@ -34,42 +32,6 @@ body: |
; GFX7: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX8-LABEL: name: fminnum_f32_f64_ieee_mode_on
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX9-LABEL: name: fminnum_f32_f64_ieee_mode_on
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -136,42 +98,6 @@ body: |
; GFX7: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
; GFX7: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
; GFX7: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX8-LABEL: name: fminnum_f32_f64_ieee_mode_off
- ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX8: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX8: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX8: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX8: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: FLAT_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
- ; GFX8: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX8: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
- ; GFX9-LABEL: name: fminnum_f32_f64_ieee_mode_off
- ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
- ; GFX9: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
- ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
- ; GFX9: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
- ; GFX9: [[V_MIN_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: GLOBAL_STORE_DWORD [[COPY3]], [[V_MIN_F32_e64_2]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
- ; GFX9: [[V_MIN_F64_:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_1:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $exec
- ; GFX9: [[V_MIN_F64_2:%[0-9]+]]:vreg_64 = V_MIN_F64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F64_]], implicit [[V_MIN_F64_1]], implicit [[V_MIN_F64_2]]
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
@@ -207,101 +133,3 @@ body: |
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
-
----
-name: fminnum_f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fminnum_f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FMINNUM:%[0-9]+]]:vgpr(s16) = G_FMINNUM [[TRUNC]], [[TRUNC1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM]](s16)
- ; GFX8-LABEL: name: fminnum_f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- ; GFX9-LABEL: name: fminnum_f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FMINNUM %2, %3
- S_ENDPGM 0, implicit %4
-...
-
----
-name: fminnum_v2f16_vv
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $sgpr0, $sgpr1
-
- ; GFX7-LABEL: name: fminnum_v2f16_vv
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX7: [[FMINNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM [[COPY]], [[COPY1]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM]](<2 x s16>)
- ; GFX8-LABEL: name: fminnum_v2f16_vv
- ; GFX8: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX8: [[FMINNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM [[COPY]], [[COPY1]]
- ; GFX8: S_ENDPGM 0, implicit [[FMINNUM]](<2 x s16>)
- ; GFX9-LABEL: name: fminnum_v2f16_vv
- ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
- ; GFX9: [[FMINNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM [[COPY]], [[COPY1]]
- ; GFX9: S_ENDPGM 0, implicit [[FMINNUM]](<2 x s16>)
- %0:vgpr(<2 x s16>) = COPY $vgpr0
- %1:vgpr(<2 x s16>) = COPY $vgpr1
- %2:vgpr(<2 x s16>) = G_FMINNUM %0, %1
- S_ENDPGM 0, implicit %2
-...
-
----
-name: fminnum_f16_v_fneg_v
-legalized: true
-regBankSelected: true
-
-body: |
- bb.0:
- liveins: $vgpr0, $vgpr1
- ; GFX7-LABEL: name: fminnum_f16_v_fneg_v
- ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
- ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
- ; GFX7: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
- ; GFX7: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX7: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC1]]
- ; GFX7: [[FMINNUM:%[0-9]+]]:vgpr(s16) = G_FMINNUM [[TRUNC]], [[FNEG]]
- ; GFX7: S_ENDPGM 0, implicit [[FMINNUM]](s16)
- ; GFX8-LABEL: name: fminnum_f16_v_fneg_v
- ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX8: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX8: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- ; GFX9-LABEL: name: fminnum_f16_v_fneg_v
- ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
- ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
- ; GFX9: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
- ; GFX9: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
- %0:vgpr(s32) = COPY $vgpr0
- %1:vgpr(s32) = COPY $vgpr1
- %2:vgpr(s16) = G_TRUNC %0
- %3:vgpr(s16) = G_TRUNC %1
- %4:vgpr(s16) = G_FNEG %3
- %5:vgpr(s16) = G_FMINNUM %2, %4
- S_ENDPGM 0, implicit %5
-...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,48 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
+
+---
+name: fminnum_f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fminnum_f16_vv
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FMINNUM %2, %3
+ S_ENDPGM 0, implicit %4
+...
+
+---
+name: fminnum_f16_v_fneg_v
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: fminnum_f16_v_fneg_v
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; CHECK: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $exec
+ ; CHECK: S_ENDPGM 0, implicit [[V_MIN_F16_e64_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = COPY $vgpr1
+ %2:vgpr(s16) = G_TRUNC %0
+ %3:vgpr(s16) = G_TRUNC %1
+ %4:vgpr(s16) = G_FNEG %3
+ %5:vgpr(s16) = G_FMINNUM %2, %4
+ S_ENDPGM 0, implicit %5
+...
Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir?rev=366680&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir Mon Jul 22 05:43:41 2019
@@ -0,0 +1,22 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
+
+---
+name: fminnum_v2f16_vv
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GFX9-LABEL: name: fminnum_v2f16_vv
+ ; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
+ ; GFX9: [[FMINNUM:%[0-9]+]]:vgpr(<2 x s16>) = G_FMINNUM [[COPY]], [[COPY1]]
+ ; GFX9: S_ENDPGM 0, implicit [[FMINNUM]](<2 x s16>)
+ %0:vgpr(<2 x s16>) = COPY $vgpr0
+ %1:vgpr(<2 x s16>) = COPY $vgpr1
+ %2:vgpr(<2 x s16>) = G_FMINNUM %0, %1
+ S_ENDPGM 0, implicit %2
+...
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