[PATCH] D64935: [AMDGPU] Add llvm.amdgcn.softwqm intrinsic
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 22 01:49:03 PDT 2019
nhaehnle added a comment.
Okay thanks, I see the logic now.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:5955-5959
+ case Intrinsic::amdgcn_softwqm: {
+ SDValue Src = Op.getOperand(1);
+ return SDValue(DAG.getMachineNode(AMDGPU::SOFT_WQM, DL, Src.getValueType(), Src),
+ 0);
+ }
----------------
arsenm wrote:
> critson wrote:
> > arsenm wrote:
> > > Is there some reason you can't just handle this with an instruction pattern?
> > For the same reason as llvm.amdgcn.wqm, we don't specify the input and output types.
> > Happy to be corrected, but I don't think there is a way to have a single instruction pattern covering all types.
> It's easier to directly select than to enumerate all the possible types. I would still expect all of these direct-to-machine-node intrinsics to be handled in AMDGPUISelDAGToDAG
You mean adding an `AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN` and lowering the softwqm intrinsic there? That does make sense to me.
================
Comment at: lib/Target/AMDGPU/SIInstructions.td:114
+// Pseudoinstruction for @llvm.amdgcn.softwqm. Like @llvm.amdgcn.wcm it is
+// turned into a copy by WQM pass, but does not seed WQM requirements.
----------------
s/wcm/wqm/
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64935/new/
https://reviews.llvm.org/D64935
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