[PATCH] D65053: [ARM] Basic And/Or/Xor handling for MVE predicates

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: t.p.northover, SjoerdMeijer, samparker, simon_tatham, ostannard.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.
dmgreen added a parent revision: D65052: [ARM] MVE predicate register support.

This adds some basic, "worst case" handling for MVE predicate Or/And/Xor, but going into and out of scalar registers, doing the operation on the scalar register.

Code by David Sherwood.


https://reviews.llvm.org/D65053

Files:
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-pred-and.ll
  llvm/test/CodeGen/Thumb2/mve-pred-not.ll
  llvm/test/CodeGen/Thumb2/mve-pred-or.ll
  llvm/test/CodeGen/Thumb2/mve-pred-xor.ll

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