[PATCH] D56772: [MIR] Add simple PRE pass to MachineCSE

[Kai Luo via Phabricator via llvm-commits]

lkail added inline comments.


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Comment at: llvm/trunk/lib/CodeGen/MachineCSE.cpp:807
+      if (BB != nullptr && BB1 != nullptr &&
+          (isPotentiallyReachable(BB1, BB) ||
+           isPotentiallyReachable(BB, BB1))) {
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Hi @anton-afanasyev , I have a concern here that CFG of LLVM IR might not be equivalent to CFG of Machine IR.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56772/new/

https://reviews.llvm.org/D56772