[PATCH] D64911: [AMDGPU] Extend the SI Load/Store optimizer

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D64911#1593515 <https://reviews.llvm.org/D64911#1593515>, @nhaehnle wrote:

> In D64911#1591502 <https://reviews.llvm.org/D64911#1591502>, @arsenm wrote:
>
> > I still think we should be handling these on the IR level
>
>
> Matt, where do you think would be the right place to do this at the IR level? Presumably you have an existing pass in mind?


Either a new pass, or teach the LoadStoreVectorizer about intrinsics. Things are generally easier in the IR, and I don't think this needs any information only available after selection


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