[PATCH] D64810: [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:431
+class MVE_ScalarShiftDRegRegWithSat<string iname, bit op5, bit op16,
+                                    list<dag> pattern=[]>
+  : MVE_ScalarShiftDoubleReg<
----------------
This class seems almost identical to `MVE_ScalarShiftDRegReg`, differing only in the extra input operand, the different AsmString, and the introduction of `bit sat;` assigned to `Inst{7}`. They could be merged into a common superclass to avoid all that copy and paste?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64810/new/

https://reviews.llvm.org/D64810