[PATCH] D61584: [DebugInfo] Some fields do not need relocations even relax is enabled.

[Hsiangkai Wang via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL366531: [DebugInfo] Some fields do not need relocations even relax is enabled. (authored by HsiangKai, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D61584?vs=206120&id=210740#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61584/new/

https://reviews.llvm.org/D61584

Files:
  llvm/trunk/lib/MC/MCExpr.cpp
  llvm/trunk/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
  llvm/trunk/test/DebugInfo/RISCV/relax-debug-frame.ll
  llvm/trunk/test/MC/RISCV/fde-reloc.s


Index: llvm/trunk/test/MC/RISCV/fde-reloc.s
===================================================================
--- llvm/trunk/test/MC/RISCV/fde-reloc.s
+++ llvm/trunk/test/MC/RISCV/fde-reloc.s
@@ -14,12 +14,9 @@
 # preparation for follow-on patches to fix it.
 
 # RELAX-RELOC:   Section (4) .rela.eh_frame {
-# RELAX-RELOC-NEXT:   0x0 R_RISCV_ADD32 - 0xFFFFFFFC
-# RELAX-RELOC-NEXT:   0x0 R_RISCV_SUB32 - 0x0
-# RELAX-RELOC-NEXT:   0x14 R_RISCV_ADD32 - 0x0
-# RELAX-RELOC-NEXT:   0x14 R_RISCV_SUB32 - 0x0
-# RELAX-RELOC-NEXT:   0x18 R_RISCV_ADD32 - 0x0
-# RELAX-RELOC-NEXT:   0x18 R_RISCV_SUB32 - 0x0
+# RELAX-RELOC-NEXT:   0x0 R_RISCV_32 - 0x10
+# RELAX-RELOC-NEXT:   0x14 R_RISCV_32 - 0x10
+# RELAX-RELOC-NEXT:   0x18 R_RISCV_32 - 0x18
 # RELAX-RELOC-NEXT:   0x1C R_RISCV_ADD32 - 0x0
 # RELAX-RELOC-NEXT:   0x1C R_RISCV_SUB32 - 0x0
 # RELAX-RELOC-NEXT:   0x20 R_RISCV_ADD32 - 0x0
Index: llvm/trunk/test/DebugInfo/RISCV/relax-debug-frame.ll
===================================================================
--- llvm/trunk/test/DebugInfo/RISCV/relax-debug-frame.ll
+++ llvm/trunk/test/DebugInfo/RISCV/relax-debug-frame.ll
@@ -6,6 +6,9 @@
 ;
 ; RELAX: Section{{.*}}.rela.{{eh|debug}}_frame {
 ; RELAX-NOT: {{[}]}}
+; RELAX-NOT: 0x0 R_RISCV_ADD32
+; RELAX-NOT: 0x0 R_RISCV_SUB32
+; RELAX-NOT: {{[}]}}
 ; RELAX: 0x20 R_RISCV_ADD32
 ; RELAX: 0x20 R_RISCV_SUB32
 ; RELAX-NOT: {{[}]}}
Index: llvm/trunk/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
===================================================================
--- llvm/trunk/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+++ llvm/trunk/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
@@ -6,14 +6,14 @@
 
 ; Check that we actually have relocations, otherwise this is kind of pointless.
 ; READOBJ-RELOCS:  Section (8) .rela.debug_info {
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_ADD32 - 0x0
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_SUB32 - 0x0
-; READOBJ-RELOCS:  Section (11) .rela.debug_addr {
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_ADD32 - 0x0
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_SUB32 - 0x0
+; READOBJ-RELOCS:    0x1B R_RISCV_ADD32 - 0x0
+; READOBJ-RELOCS-NEXT:    0x1B R_RISCV_SUB32 - 0x0
+; READOBJ-RELOCS:  Section (15) .rela.debug_frame {
+; READOBJ-RELOCS:    0x20 R_RISCV_ADD32 - 0x0
+; READOBJ-RELOCS-NEXT:    0x20 R_RISCV_SUB32 - 0x0
 ; READOBJ-RELOCS:  Section (17) .rela.debug_line {
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_ADD32 - 0xFFFFFFFC
-; READOBJ-RELOCS-NEXT:    0x0 R_RISCV_SUB32 .Lline_table_start0 0x0
+; READOBJ-RELOCS:    0x5A R_RISCV_ADD16 - 0x0
+; READOBJ-RELOCS-NEXT:    0x5A R_RISCV_SUB16 - 0x0
 
 ; Check that we can print the source, even with relocations.
 ; OBJDUMP-SOURCE: Disassembly of section .text:
Index: llvm/trunk/lib/MC/MCExpr.cpp
===================================================================
--- llvm/trunk/lib/MC/MCExpr.cpp
+++ llvm/trunk/lib/MC/MCExpr.cpp
@@ -577,6 +577,24 @@
   A = B = nullptr;
 }
 
+static bool canFold(const MCAssembler *Asm, const MCSymbolRefExpr *A,
+                    const MCSymbolRefExpr *B, bool InSet) {
+  if (InSet)
+    return true;
+
+  if (!Asm->getBackend().requiresDiffExpressionRelocations())
+    return true;
+
+  const MCSymbol &CheckSym = A ? A->getSymbol() : B->getSymbol();
+  if (!CheckSym.isInSection())
+    return true;
+
+  if (!CheckSym.getSection().hasInstructions())
+    return true;
+
+  return false;
+}
+
 /// Evaluate the result of an add between (conceptually) two MCValues.
 ///
 /// This routine conceptually attempts to construct an MCValue:
@@ -617,8 +635,7 @@
   // the backend requires this to be emitted as individual relocations, unless
   // the InSet flag is set to get the current difference anyway (used for
   // example to calculate symbol sizes).
-  if (Asm &&
-      (InSet || !Asm->getBackend().requiresDiffExpressionRelocations())) {
+  if (Asm && canFold(Asm, LHS_A, LHS_B, InSet)) {
     // First, fold out any differences which are fully resolved. By
     // reassociating terms in
     //   Result = (LHS_A - LHS_B + LHS_Cst) + (RHS_A - RHS_B + RHS_Cst).


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