[PATCH] D64967: [AMDGPU] Allow register tuples to set asm names

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added a reviewer: arsenm.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

This change reverts most of the previous register name generation.
The real problem is that RegisterTuple does not generate asm names.
Added optional operand to RegisterTuple. This way we can simplify
register name access and dramatically reduce the size of static
tables for the backend.


https://reviews.llvm.org/D64967

Files:
  include/llvm/Target/Target.td
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  lib/Target/AMDGPU/SIRegisterInfo.td
  utils/TableGen/CodeGenRegisters.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D64967.210723.patch
Type: text/x-patch
Size: 30468 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190719/60f8f9be/attachment.bin>