[PATCH] D58232: WIP: GlobalISel: Don't materialize immarg arguments to intrinsics
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 17 08:49:50 PDT 2019
arsenm updated this revision to Diff 210343.
arsenm added a comment.
Fix other target failures except hexagon, which uses generated td files.
Sort of worked around the ARM crash, which is the commented out case in immarg.td. The problem was using a "timm" input pattern, and an "imm:" in the result pattern. TableGen has never made it clear what things are valid inputs or outputs, and I don't think this is handled consistently. This does work out in the DAG emitter, so I don't know if this should be allowed or an error. It does error if you try to use timm in an output.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58232/new/
https://reviews.llvm.org/D58232
Files:
include/llvm/CodeGen/GlobalISel/InstructionSelector.h
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
include/llvm/Target/TargetSelectionDAG.td
lib/CodeGen/GlobalISel/IRTranslator.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/AMDGPU/BUFInstructions.td
lib/Target/AMDGPU/DSInstructions.td
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIInstructions.td
lib/Target/AMDGPU/SOPInstructions.td
lib/Target/AMDGPU/VOP1Instructions.td
lib/Target/AMDGPU/VOP3Instructions.td
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/ARMInstrThumb2.td
lib/Target/Mips/MicroMipsDSPInstrInfo.td
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsDSPInstrInfo.td
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsMSAInstrInfo.td
lib/Target/Mips/MipsSEISelLowering.cpp
lib/Target/PowerPC/PPCInstrAltivec.td
lib/Target/PowerPC/PPCInstrVSX.td
lib/Target/RISCV/RISCVInstrInfoA.td
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
lib/Target/SystemZ/SystemZISelLowering.cpp
lib/Target/SystemZ/SystemZInstrFormats.td
lib/Target/SystemZ/SystemZInstrVector.td
lib/Target/SystemZ/SystemZOperands.td
lib/Target/SystemZ/SystemZOperators.td
lib/Target/SystemZ/SystemZPatterns.td
lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
lib/Target/WebAssembly/WebAssemblyInstrBulkMemory.td
lib/Target/X86/X86ISelDAGToDAG.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrMMX.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86InstrSystem.td
lib/Target/X86/X86InstrTSX.td
lib/Target/X86/X86InstrXOP.td
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
test/TableGen/GlobalISelEmitter.td
test/TableGen/immarg.td
utils/TableGen/GlobalISelEmitter.cpp
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