[PATCH] D64944: [GlobalISel][AArch64] Add support for base register + offset register loads

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 18 14:50:13 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rL366503: [GlobalISel][AArch64] Add support for base register + offset register loads (authored by paquette, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D64944?vs=210656&id=210683#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64944/new/

https://reviews.llvm.org/D64944

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/trunk/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir

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