[PATCH] D64910: [IPRA][ARM] Disable no-CSR optimisation for ARM

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard created this revision.
ostannard added reviewers: mehdi_amini, arsenm.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

This optimisation isn't generally profitable for ARM, because we can
save/restore many registers in the prologue and epilogue using the PUSH
and POP instructions, but mostly use individual LDR/STR instructions for
other spills.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D64910

Files:
  llvm/include/llvm/CodeGen/TargetFrameLowering.h
  llvm/lib/CodeGen/RegUsageInfoCollector.cpp
  llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
  llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  llvm/lib/Target/ARM/ARMFrameLowering.h
  llvm/test/CodeGen/ARM/ipra-no-csr.ll

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