[PATCH] D64836: [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions.
Andrei Safronov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 15:32:32 PDT 2019
andreisfr created this revision.
andreisfr added reviewers: jyknight, ivanbaev.
Herald added subscribers: llvm-commits, hiraditya, mgorny.
Herald added a project: LLVM.
Add branch/jump/call/l32r instructions and fixups support. Add R_XTENSA_32/R_XTENSA_SLOT0_OP
relocations in object files generation. Modify tests to support new instructions.
Add tests for relocations and fixups.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D64836
Files:
llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaELFObjectWriter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaFixupKinds.h
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
llvm/lib/Target/Xtensa/XtensaInstrInfo.td
llvm/lib/Target/Xtensa/XtensaOperands.td
llvm/test/MC/Xtensa/fixups-diagnostics.s
llvm/test/MC/Xtensa/fixups.s
llvm/test/MC/Xtensa/relocations.s
llvm/test/MC/Xtensa/xtensa-invalid.s
llvm/test/MC/Xtensa/xtensa-valid.s
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