[PATCH] D64490: AMDGPU/GlobalISel: Selection for fminnum/fmaxnum
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 07:57:33 PDT 2019
arsenm added a comment.
In D64490#1587203 <https://reviews.llvm.org/D64490#1587203>, @nhaehnle wrote:
> Oh, is that because the new node causes the intrinsics to be lowered to G_FMINNUM etc.? Why doesn't this affect any other targets?
I think Tom just added these here as sample intrinsics. The handling wasn't correct anyway. Other targets didn't try to do this sort of thing. I don't think any generic intrinsic should be directly handled this way, and they should all route through a G_* instruction to be legalized
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64490/new/
https://reviews.llvm.org/D64490
More information about the llvm-commits
mailing list