[llvm] r366197 - [AArch64] Implement __jcvt intrinsic from Armv8.3-A
Kyrylo Tkachov via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 02:27:39 PDT 2019
Author: ktkachov
Date: Tue Jul 16 02:27:39 2019
New Revision: 366197
URL: http://llvm.org/viewvc/llvm-project?rev=366197&view=rev
Log:
[AArch64] Implement __jcvt intrinsic from Armv8.3-A
The jcvt intrinsic defined in ACLE [1] is available when ARM_FEATURE_JCVT is defined.
This change introduces the AArch64 intrinsic, wires it up to the instruction and a new clang builtin function.
The __ARM_FEATURE_JCVT macro is now defined when an Armv8.3-A or higher target is used.
I've implemented the target detection logic in Clang so that this feature is enabled for architectures from armv8.3-a onwards (so -march=armv8.4-a also enables this, for example).
make check-all didn't show any new failures.
[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics
Differential Revision: https://reviews.llvm.org/D64495
Added:
llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
Modified:
llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
llvm/trunk/utils/git-svn/git-llvm
Modified: llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td?rev=366197&r1=366196&r2=366197&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td Tue Jul 16 02:27:39 2019
@@ -31,6 +31,8 @@ def int_aarch64_sdiv : Intrinsic<[llvm_a
def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
LLVMMatchType<0>], [IntrNoMem]>;
+def int_aarch64_fjcvtzs : Intrinsic<[llvm_i32_ty], [llvm_double_ty], [IntrNoMem]>;
+
//===----------------------------------------------------------------------===//
// HINT
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td?rev=366197&r1=366196&r2=366197&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td Tue Jul 16 02:27:39 2019
@@ -717,7 +717,9 @@ let Predicates = [HasPA] in {
// v8.3a floating point conversion for javascript
let Predicates = [HasJS, HasFPARMv8] in
def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
- "fjcvtzs", []> {
+ "fjcvtzs",
+ [(set GPR32:$Rd,
+ (int_aarch64_fjcvtzs FPR64:$Rn))]> {
let Inst{31} = 0;
} // HasJS, HasFPARMv8
Added: llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll?rev=366197&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll Tue Jul 16 02:27:39 2019
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s
+
+define i32 @test_jcvt(double %v) {
+; CHECK-LABEL: test_jcvt:
+; CHECK: fjcvtzs w0, d0
+ %val = call i32 @llvm.aarch64.fjcvtzs(double %v)
+ ret i32 %val
+}
+
+declare i32 @llvm.aarch64.fjcvtzs(double)
Modified: llvm/trunk/utils/git-svn/git-llvm
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/git-svn/git-llvm?rev=366197&r1=366196&r2=366197&view=diff
==============================================================================
--- llvm/trunk/utils/git-svn/git-llvm (original)
+++ llvm/trunk/utils/git-svn/git-llvm Tue Jul 16 02:27:39 2019
@@ -372,7 +372,7 @@ def svn_push_one_rev(svn_repo, rev, git_
# Now we're ready to commit.
commit_msg = git('show', '--pretty=%B', '--quiet', rev)
if not dry_run:
- commit_args = ['commit', '-m', commit_msg]
+ commit_args = ['commit', '-m', commit_msg, '--username', 'ktkachov']
if '--force-interactive' in svn(svn_repo, 'commit', '--help'):
commit_args.append('--force-interactive')
log(svn(svn_repo, *commit_args))
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