[llvm] r366149 - [WebAssembly] Add missing utility methods for exnref type

[Heejin Ahn via llvm-commits]

Author: aheejin
Date: Mon Jul 15 16:04:00 2019
New Revision: 366149

URL: http://llvm.org/viewvc/llvm-project?rev=366149&view=rev
Log:
[WebAssembly] Add missing utility methods for exnref type

Summary:
This adds missing utility methods and copy instruction handling for
`exnref` type and also adds tests.

`tee` instruction tests are missing because `isTee` is currently only
used in ExplicitLocals pass and testing that pass in mir requires
serialization of stackified registers in mir files, which is a bit
nontrivial because `MachineFunctionInfo` only has info of vreg numbers
(which are large integers) but not the mir's register numbers. But this
change is quite trivial anyway.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64705

Added:
    llvm/trunk/test/CodeGen/WebAssembly/reg-argument.mir
Modified:
    llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
    llvm/trunk/test/CodeGen/WebAssembly/reg-copy.mir

Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h?rev=366149&r1=366148&r2=366149&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h Mon Jul 15 16:04:00 2019
@@ -385,6 +385,8 @@ inline bool isArgument(unsigned Opc) {
   case WebAssembly::ARGUMENT_v4f32_S:
   case WebAssembly::ARGUMENT_v2f64:
   case WebAssembly::ARGUMENT_v2f64_S:
+  case WebAssembly::ARGUMENT_exnref:
+  case WebAssembly::ARGUMENT_exnref_S:
     return true;
   default:
     return false;
@@ -423,6 +425,8 @@ inline bool isTee(unsigned Opc) {
   case WebAssembly::TEE_F64_S:
   case WebAssembly::TEE_V128:
   case WebAssembly::TEE_V128_S:
+  case WebAssembly::TEE_EXNREF:
+  case WebAssembly::TEE_EXNREF_S:
     return true;
   default:
     return false;

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp?rev=366149&r1=366148&r2=366149&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp Mon Jul 15 16:04:00 2019
@@ -75,6 +75,8 @@ void WebAssemblyInstrInfo::copyPhysReg(M
     CopyOpcode = WebAssembly::COPY_F64;
   else if (RC == &WebAssembly::V128RegClass)
     CopyOpcode = WebAssembly::COPY_V128;
+  else if (RC == &WebAssembly::EXNREFRegClass)
+    CopyOpcode = WebAssembly::COPY_EXNREF;
   else
     llvm_unreachable("Unexpected register class");
 

Added: llvm/trunk/test/CodeGen/WebAssembly/reg-argument.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/reg-argument.mir?rev=366149&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/reg-argument.mir (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/reg-argument.mir Mon Jul 15 16:04:00 2019
@@ -0,0 +1,59 @@
+# RUN: llc -mtriple=wasm32-unknown-unknown %s -o - -run-pass wasm-argument-move  | FileCheck %s
+
+# wasm-argument-move pass moves all ARGUMENT instructions to the top of the
+# entry BB.
+---
+name: argument_i32
+# CHECK-LABEL: argument_i32
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %1:i32 = ARGUMENT_i32 0
+  bb.0:
+    %0:i32 = CONST_I32 0, implicit-def $arguments
+    %1:i32 = ARGUMENT_i32 0, implicit $arguments
+    RETURN_VOID implicit-def $arguments
+...
+---
+name: argument_i64
+# CHECK-LABEL: argument_i64
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %1:i64 = ARGUMENT_i64 0
+  bb.0:
+    %0:i32 = CONST_I32 0, implicit-def $arguments
+    %1:i64 = ARGUMENT_i64 0, implicit $arguments
+    RETURN_VOID implicit-def $arguments
+...
+---
+name: argument_f32
+# CHECK-LABEL: argument_f32
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %1:f32 = ARGUMENT_f32 0
+  bb.0:
+    %0:i32 = CONST_I32 0, implicit-def $arguments
+    %1:f32 = ARGUMENT_f32 0, implicit $arguments
+    RETURN_VOID implicit-def $arguments
+...
+---
+name: argument_f64
+# CHECK-LABEL: argument_f64
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %1:f64 = ARGUMENT_f64 0
+  bb.0:
+    %0:i32 = CONST_I32 0, implicit-def $arguments
+    %1:f64 = ARGUMENT_f64 0, implicit $arguments
+    RETURN_VOID implicit-def $arguments
+...
+---
+name: argument_exnref
+# CHECK-LABEL: argument_exnref
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %1:exnref = ARGUMENT_exnref 0
+  bb.0:
+    %0:i32 = CONST_I32 0, implicit-def $arguments
+    %1:exnref = ARGUMENT_exnref 0, implicit $arguments
+    RETURN_VOID implicit-def $arguments
+...

Modified: llvm/trunk/test/CodeGen/WebAssembly/reg-copy.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/reg-copy.mir?rev=366149&r1=366148&r2=366149&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/reg-copy.mir (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/reg-copy.mir Mon Jul 15 16:04:00 2019
@@ -55,3 +55,14 @@ body: |
     %0:v128 = COPY %1:v128
     RETURN_VOID implicit-def $arguments
 ...
+---
+name: copy_exnref
+# CHECK-LABEL: copy_exnref
+body: |
+  ; CHECK-LABEL: bb.0:
+  ; CHECK-NEXT: %0:exnref = COPY_EXNREF %1:exnref
+  ; CHECK-NEXT: RETURN_VOID
+  bb.0:
+    %0:exnref = COPY %1:exnref
+    RETURN_VOID implicit-def $arguments
+...