[PATCH] D64766: [AMDGPU] Enable merging m0 initializations.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:458-459
+getFirstNonProlog(MachineBasicBlock *MBB, const TargetInstrInfo *TII) {
+  MachineBasicBlock::iterator I = MBB->getFirstNonPHI();
+  while (I != MBB->end() && TII->isBasicBlockPrologue(*I))
+    ++I;
----------------
Why does this need to care about the prolog instructions? (FYI I'm planning on eliminating the rarely followed concept)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64766/new/

https://reviews.llvm.org/D64766