[PATCH] D64756: AMDGPU: Use getTargetConstant
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 15 09:55:22 PDT 2019
arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Avoids creating an extra intermediate mov.
https://reviews.llvm.org/D64756
Files:
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
test/CodeGen/AMDGPU/shift-i128.ll
Index: test/CodeGen/AMDGPU/shift-i128.ll
===================================================================
--- test/CodeGen/AMDGPU/shift-i128.ll
+++ test/CodeGen/AMDGPU/shift-i128.ll
@@ -150,13 +150,13 @@
; GCN-LABEL: v_lshr_i128_kv:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: s_mov_b32 s5, 0
; GCN-NEXT: s_movk_i32 s4, 0x41
+; GCN-NEXT: s_mov_b32 s5, 0
; GCN-NEXT: v_lshr_b64 v[1:2], s[4:5], v0
; GCN-NEXT: v_cmp_gt_u32_e32 vcc, 64, v0
+; GCN-NEXT: v_mov_b32_e32 v3, s4
; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0
; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
-; GCN-NEXT: v_mov_b32_e32 v3, 0x41
; GCN-NEXT: s_and_b64 vcc, s[4:5], vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v1, s[4:5]
; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc
Index: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -620,10 +620,10 @@
EVT VT) const {
SDNode *Lo = CurDAG->getMachineNode(
AMDGPU::S_MOV_B32, DL, MVT::i32,
- CurDAG->getConstant(Imm & 0xFFFFFFFF, DL, MVT::i32));
+ CurDAG->getTargetConstant(Imm & 0xFFFFFFFF, DL, MVT::i32));
SDNode *Hi =
CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32,
- CurDAG->getConstant(Imm >> 32, DL, MVT::i32));
+ CurDAG->getTargetConstant(Imm >> 32, DL, MVT::i32));
const SDValue Ops[] = {
CurDAG->getTargetConstant(AMDGPU::SReg_64RegClassID, DL, MVT::i32),
SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
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