[llvm] r366067 - [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 15 07:37:57 PDT 2019


Author: dpreobra
Date: Mon Jul 15 07:37:57 2019
New Revision: 366067

URL: http://llvm.org/viewvc/llvm-project?rev=366067&view=rev
Log:
[AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions

See bug 42599: https://bugs.llvm.org/show_bug.cgi?id=42599

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D64716

Modified:
    llvm/trunk/lib/Target/AMDGPU/DSInstructions.td
    llvm/trunk/test/MC/AMDGPU/ds.s
    llvm/trunk/test/MC/AMDGPU/expressions.s
    llvm/trunk/test/MC/AMDGPU/gfx10_asm_all.s
    llvm/trunk/test/MC/AMDGPU/gfx7_asm_all.s
    llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s
    llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s
    llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt
    llvm/trunk/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
    llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
    llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt

Modified: llvm/trunk/lib/Target/AMDGPU/DSInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/DSInstructions.td?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/DSInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/DSInstructions.td Mon Jul 15 07:37:57 2019
@@ -38,6 +38,8 @@ class DS_Pseudo <string opName, dag outs
   bits<1> has_data0 = 1;
   bits<1> has_data1 = 1;
 
+  bits<1> has_gws_data0 = 0; // data0 is encoded as addr
+
   bits<1> has_offset  = 1; // has "offset" that should be split to offset0,1
   bits<1> has_offset0 = 1;
   bits<1> has_offset1 = 1;
@@ -320,7 +322,7 @@ class DS_GWS_1D <string opName>
 : DS_GWS<opName,
   (ins VGPR_32:$data0, offset:$offset, gds:$gds), "$data0$offset gds"> {
 
-  let has_data0 = 1;
+  let has_gws_data0 = 1;
 }
 
 class DS_VOID <string opName> : DS_Pseudo<opName,
@@ -832,7 +834,7 @@ class Base_DS_Real_gfx6_gfx7_gfx10<bits<
   let Inst{17}    = !if(ps.has_gds, gds, ps.gdsValue);
   let Inst{25-18} = op;
   let Inst{31-26} = 0x36;
-  let Inst{39-32} = !if(ps.has_addr, addr, 0);
+  let Inst{39-32} = !if(ps.has_addr, addr, !if(ps.has_gws_data0, data0, 0));
   let Inst{47-40} = !if(ps.has_data0, data0, 0);
   let Inst{55-48} = !if(ps.has_data1, data1, 0);
   let Inst{63-56} = !if(ps.has_vdst, vdst, 0);
@@ -1051,7 +1053,7 @@ class DS_Real_vi <bits<8> op, DS_Pseudo
   let Inst{16}    = !if(ds.has_gds, gds, ds.gdsValue);
   let Inst{24-17} = op;
   let Inst{31-26} = 0x36; // ds prefix
-  let Inst{39-32} = !if(ds.has_addr, addr, 0);
+  let Inst{39-32} = !if(ds.has_addr, addr, !if(ds.has_gws_data0, data0, 0));
   let Inst{47-40} = !if(ds.has_data0, data0, 0);
   let Inst{55-48} = !if(ds.has_data1, data1, 0);
   let Inst{63-56} = !if(ds.has_vdst, vdst, 0);

Modified: llvm/trunk/test/MC/AMDGPU/ds.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/ds.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/ds.s (original)
+++ llvm/trunk/test/MC/AMDGPU/ds.s Mon Jul 15 07:37:57 2019
@@ -148,12 +148,12 @@ ds_max_f32 v2, v4
 // VI:   ds_max_f32 v2, v4 ; encoding: [0x00,0x00,0x26,0xd8,0x02,0x04,0x00,0x00]
 
 ds_gws_init v2 gds
-// SICI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x66,0xd8,0x00,0x02,0x00,0x00]
-// VI:   ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x02,0x00,0x00]
+// SICI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x66,0xd8,0x02,0x00,0x00,0x00]
+// VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x02,0x00,0x00,0x00]
 
 ds_gws_init v3 offset:12345 gds
-// SICI: ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x66,0xd8,0x00,0x03,0x00,0x00]
-// VI:   ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x33,0xd9,0x00,0x03,0x00,0x00]
+// SICI: ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x66,0xd8,0x03,0x00,0x00,0x00]
+// VI: ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x33,0xd9,0x03,0x00,0x00,0x00]
 
 ds_gws_sema_v gds
 // SICI: ds_gws_sema_v gds ; encoding: [0x00,0x00,0x6a,0xd8,0x00,0x00,0x00,0x00]
@@ -164,16 +164,16 @@ ds_gws_sema_v offset:257 gds
 // VI:   ds_gws_sema_v offset:257 gds    ; encoding: [0x01,0x01,0x35,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v2 gds
-// SICI: ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x6e,0xd8,0x00,0x02,0x00,0x00]
-// VI:   ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x37,0xd9,0x00,0x02,0x00,0x00]
+// SICI: ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x6e,0xd8,0x02,0x00,0x00,0x00]
+// VI: ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x37,0xd9,0x02,0x00,0x00,0x00]
 
 ds_gws_sema_p gds
 // SICI: ds_gws_sema_p gds ; encoding: [0x00,0x00,0x72,0xd8,0x00,0x00,0x00,0x00]
 // VI:   ds_gws_sema_p gds ; encoding: [0x00,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v2 gds
-// SICI: ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x76,0xd8,0x00,0x02,0x00,0x00]
-// VI:   ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x3b,0xd9,0x00,0x02,0x00,0x00]
+// SICI: ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x76,0xd8,0x02,0x00,0x00,0x00]
+// VI: ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x3b,0xd9,0x02,0x00,0x00,0x00]
 
 ds_write_b8 v2, v4
 // SICI: ds_write_b8 v2, v4 ; encoding: [0x00,0x00,0x78,0xd8,0x02,0x04,0x00,0x00]

Modified: llvm/trunk/test/MC/AMDGPU/expressions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/expressions.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/expressions.s (original)
+++ llvm/trunk/test/MC/AMDGPU/expressions.s Mon Jul 15 07:37:57 2019
@@ -233,7 +233,7 @@ s_mov_b32 s0, global
 
 // Use a token with the same name as a global
 ds_gws_init v2 gds
-// VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x02,0x00,0x00]
+// VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x02,0x00,0x00,0x00]
 
 // Use a global with the same name as a token
 s_mov_b32 s0, gds

Modified: llvm/trunk/test/MC/AMDGPU/gfx10_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx10_asm_all.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx10_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx10_asm_all.s Mon Jul 15 07:37:57 2019
@@ -2462,25 +2462,25 @@ ds_gws_init v0 gds
 // GFX10: encoding: [0x00,0x00,0x66,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_init v255 gds
-// GFX10: encoding: [0x00,0x00,0x66,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x66,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_init v0 offset:0 gds
 // GFX10: encoding: [0x00,0x00,0x66,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:0 gds
-// GFX10: encoding: [0x00,0x00,0x66,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x66,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_init v0 offset:4660 gds
 // GFX10: encoding: [0x34,0x12,0x66,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:4660 gds
-// GFX10: encoding: [0x34,0x12,0x66,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x34,0x12,0x66,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_init v0 offset:65535 gds
 // GFX10: encoding: [0xff,0xff,0x66,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:65535 gds
-// GFX10: encoding: [0xff,0xff,0x66,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0xff,0xff,0x66,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_v gds
 // GFX10: encoding: [0x00,0x00,0x6a,0xd8,0x00,0x00,0x00,0x00]
@@ -2498,25 +2498,25 @@ ds_gws_sema_br v0 gds
 // GFX10: encoding: [0x00,0x00,0x6e,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 gds
-// GFX10: encoding: [0x00,0x00,0x6e,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x6e,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v0 offset:0 gds
 // GFX10: encoding: [0x00,0x00,0x6e,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:0 gds
-// GFX10: encoding: [0x00,0x00,0x6e,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x6e,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v0 offset:4660 gds
 // GFX10: encoding: [0x34,0x12,0x6e,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:4660 gds
-// GFX10: encoding: [0x34,0x12,0x6e,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x34,0x12,0x6e,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v0 offset:65535 gds
 // GFX10: encoding: [0xff,0xff,0x6e,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:65535 gds
-// GFX10: encoding: [0xff,0xff,0x6e,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0xff,0xff,0x6e,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_p gds
 // GFX10: encoding: [0x00,0x00,0x72,0xd8,0x00,0x00,0x00,0x00]
@@ -2534,25 +2534,25 @@ ds_gws_barrier v0 gds
 // GFX10: encoding: [0x00,0x00,0x76,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v255 gds
-// GFX10: encoding: [0x00,0x00,0x76,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x76,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v0 offset:0 gds
 // GFX10: encoding: [0x00,0x00,0x76,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:0 gds
-// GFX10: encoding: [0x00,0x00,0x76,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x00,0x00,0x76,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v0 offset:4660 gds
 // GFX10: encoding: [0x34,0x12,0x76,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:4660 gds
-// GFX10: encoding: [0x34,0x12,0x76,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0x34,0x12,0x76,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v0 offset:65535 gds
 // GFX10: encoding: [0xff,0xff,0x76,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:65535 gds
-// GFX10: encoding: [0xff,0xff,0x76,0xd8,0x00,0xff,0x00,0x00]
+// GFX10: encoding: [0xff,0xff,0x76,0xd8,0xff,0x00,0x00,0x00]
 
 ds_write_b8 v0, v1
 // GFX10: encoding: [0x00,0x00,0x78,0xd8,0x00,0x01,0x00,0x00]

Modified: llvm/trunk/test/MC/AMDGPU/gfx7_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx7_asm_all.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx7_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx7_asm_all.s Mon Jul 15 07:37:57 2019
@@ -469,19 +469,19 @@ ds_gws_sema_release_all offset:4 gds
 // CHECK: [0x04,0x00,0x62,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x66,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x66,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x66,0xd8,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x66,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_init v1 gds
-// CHECK: [0x00,0x00,0x66,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x66,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:0 gds
-// CHECK: [0x00,0x00,0x66,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x66,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:4 gds
-// CHECK: [0x04,0x00,0x66,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x66,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_v offset:65535 gds
 // CHECK: [0xff,0xff,0x6a,0xd8,0x00,0x00,0x00,0x00]
@@ -496,19 +496,19 @@ ds_gws_sema_v offset:4 gds
 // CHECK: [0x04,0x00,0x6a,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x6e,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x6e,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x6e,0xd8,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x6e,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 gds
-// CHECK: [0x00,0x00,0x6e,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x6e,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:0 gds
-// CHECK: [0x00,0x00,0x6e,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x6e,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:4 gds
-// CHECK: [0x04,0x00,0x6e,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x6e,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_p offset:65535 gds
 // CHECK: [0xff,0xff,0x72,0xd8,0x00,0x00,0x00,0x00]
@@ -523,19 +523,19 @@ ds_gws_sema_p offset:4 gds
 // CHECK: [0x04,0x00,0x72,0xd8,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x76,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x76,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x76,0xd8,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x76,0xd8,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v1 gds
-// CHECK: [0x00,0x00,0x76,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x76,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:0 gds
-// CHECK: [0x00,0x00,0x76,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x76,0xd8,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:4 gds
-// CHECK: [0x04,0x00,0x76,0xd8,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x76,0xd8,0x01,0x00,0x00,0x00]
 
 ds_write_b8 v1, v2 offset:65535
 // CHECK: [0xff,0xff,0x78,0xd8,0x01,0x02,0x00,0x00]

Modified: llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s Mon Jul 15 07:37:57 2019
@@ -2665,19 +2665,19 @@ ds_gws_sema_release_all offset:4 gds
 // CHECK: [0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_init v1 gds
-// CHECK: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:0 gds
-// CHECK: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:4 gds
-// CHECK: [0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_v offset:65535 gds
 // CHECK: [0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00]
@@ -2692,19 +2692,19 @@ ds_gws_sema_v offset:4 gds
 // CHECK: [0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 gds
-// CHECK: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:0 gds
-// CHECK: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:4 gds
-// CHECK: [0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_p offset:65535 gds
 // CHECK: [0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00]
@@ -2719,19 +2719,19 @@ ds_gws_sema_p offset:4 gds
 // CHECK: [0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v1 gds
-// CHECK: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:0 gds
-// CHECK: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:4 gds
-// CHECK: [0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_consume v5 offset:65535
 // CHECK: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05]

Modified: llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s Mon Jul 15 07:37:57 2019
@@ -2834,19 +2834,19 @@ ds_gws_sema_release_all offset:4 gds
 // CHECK: [0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_init v1 gds
-// CHECK: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:0 gds
-// CHECK: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_init v1 offset:4 gds
-// CHECK: [0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_v offset:65535 gds
 // CHECK: [0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00]
@@ -2861,19 +2861,19 @@ ds_gws_sema_v offset:4 gds
 // CHECK: [0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 gds
-// CHECK: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:0 gds
-// CHECK: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_br v1 offset:4 gds
-// CHECK: [0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_sema_p offset:65535 gds
 // CHECK: [0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00]
@@ -2888,19 +2888,19 @@ ds_gws_sema_p offset:4 gds
 // CHECK: [0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:65535 gds
-// CHECK: [0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v255 offset:65535 gds
-// CHECK: [0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00]
+// CHECK: [0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00]
 
 ds_gws_barrier v1 gds
-// CHECK: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:0 gds
-// CHECK: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_gws_barrier v1 offset:4 gds
-// CHECK: [0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
+// CHECK: [0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
 
 ds_consume v5 offset:65535
 // CHECK: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05]

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt Mon Jul 15 07:37:57 2019
@@ -81,11 +81,11 @@
 # VI:   ds_max_f32 v2, v4 ; encoding: [0x00,0x00,0x26,0xd8,0x02,0x04,0x00,0x00]
 0x00 0x00 0x26 0xd8 0x02 0x04 0x00 0x00
 
-# VI:   ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x02,0x00,0x00]
-0x00 0x00 0x33 0xd9 0x00 0x02 0x00,0x00
+# VI:   ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x02,0x00,0x00,0x00]
+0x00 0x00 0x33 0xd9 0x02 0x00 0x00,0x00
 
-# VI:   ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x33,0xd9,0x00,0x03,0x00,0x00]
-0x39 0x30 0x33 0xd9 0x00 0x03 0x00 0x00
+# VI:   ds_gws_init v3 offset:12345 gds ; encoding: [0x39,0x30,0x33,0xd9,0x03,0x00,0x00,0x00]
+0x39 0x30 0x33 0xd9 0x03 0x00 0x00 0x00
 
 # VI:   ds_gws_sema_v gds ; encoding: [0x00,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
 0x00 0x00 0x35 0xd9 0x00 0x00 0x00 0x00
@@ -93,14 +93,14 @@
 # VI:   ds_gws_sema_v offset:257 gds    ; encoding: [0x01,0x01,0x35,0xd9,0x00,0x00,0x00,0x00]
 0x01 0x01 0x35 0xd9 0x00 0x00 0x00 0x00
 
-# VI:   ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x37,0xd9,0x00,0x02,0x00,0x00]
-0x00 0x00 0x37 0xd9 0x00 0x02 0x00 0x00
+# VI:   ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x37,0xd9,0x02,0x00,0x00,0x00]
+0x00 0x00 0x37 0xd9 0x02 0x00 0x00 0x00
 
 # VI:   ds_gws_sema_p gds ; encoding: [0x00,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 0x00 0x00 0x39 0xd9 0x00 0x00 0x00 0x00
 
-# VI:   ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x3b,0xd9,0x00,0x02,0x00,0x00]
-0x00 0x00 0x3b 0xd9 0x00 0x02 0x00 0x00
+# VI:   ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x3b,0xd9,0x02,0x00,0x00,0x00]
+0x00 0x00 0x3b 0xd9 0x02 0x00 0x00 0x00
 
 # VI:   ds_write_b8 v2, v4 ; encoding: [0x00,0x00,0x3c,0xd8,0x02,0x04,0x00,0x00]
 0x00 0x00 0x3c 0xd8 0x02 0x04 0x00 0x00

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt Mon Jul 15 07:37:57 2019
@@ -3578,14 +3578,14 @@
 # GFX10: ds_gws_barrier v0 offset:65535 gds ; encoding: [0xff,0xff,0x76,0xd8,0x00,0x00,0x00,0x00]
 0xff,0xff,0x76,0xd8,0x00,0x00,0x00,0x00
 
-# GFX10: ds_gws_barrier v255 gds         ; encoding: [0x00,0x00,0x76,0xd8,0x00,0xff,0x00,0x00]
-0x00,0x00,0x76,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_barrier v255 gds         ; encoding: [0x00,0x00,0x76,0xd8,0xff,0x00,0x00,0x00]
+0x00,0x00,0x76,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_barrier v255 offset:4660 gds ; encoding: [0x34,0x12,0x76,0xd8,0x00,0xff,0x00,0x00]
-0x34,0x12,0x76,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_barrier v255 offset:4660 gds ; encoding: [0x34,0x12,0x76,0xd8,0xff,0x00,0x00,0x00]
+0x34,0x12,0x76,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_barrier v255 offset:65535 gds ; encoding: [0xff,0xff,0x76,0xd8,0x00,0xff,0x00,0x00]
-0xff,0xff,0x76,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_barrier v255 offset:65535 gds ; encoding: [0xff,0xff,0x76,0xd8,0xff,0x00,0x00,0x00]
+0xff,0xff,0x76,0xd8,0xff,0x00,0x00,0x00
 
 # GFX10: ds_gws_init v0 gds              ; encoding: [0x00,0x00,0x66,0xd8,0x00,0x00,0x00,0x00]
 0x00,0x00,0x66,0xd8,0x00,0x00,0x00,0x00
@@ -3596,14 +3596,14 @@
 # GFX10: ds_gws_init v0 offset:65535 gds ; encoding: [0xff,0xff,0x66,0xd8,0x00,0x00,0x00,0x00]
 0xff,0xff,0x66,0xd8,0x00,0x00,0x00,0x00
 
-# GFX10: ds_gws_init v255 gds            ; encoding: [0x00,0x00,0x66,0xd8,0x00,0xff,0x00,0x00]
-0x00,0x00,0x66,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_init v255 gds            ; encoding: [0x00,0x00,0x66,0xd8,0xff,0x00,0x00,0x00]
+0x00,0x00,0x66,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_init v255 offset:4660 gds ; encoding: [0x34,0x12,0x66,0xd8,0x00,0xff,0x00,0x00]
-0x34,0x12,0x66,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_init v255 offset:4660 gds ; encoding: [0x34,0x12,0x66,0xd8,0xff,0x00,0x00,0x00]
+0x34,0x12,0x66,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_init v255 offset:65535 gds ; encoding: [0xff,0xff,0x66,0xd8,0x00,0xff,0x00,0x00]
-0xff,0xff,0x66,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_init v255 offset:65535 gds ; encoding: [0xff,0xff,0x66,0xd8,0xff,0x00,0x00,0x00]
+0xff,0xff,0x66,0xd8,0xff,0x00,0x00,0x00
 
 # GFX10: ds_gws_sema_br v0 gds           ; encoding: [0x00,0x00,0x6e,0xd8,0x00,0x00,0x00,0x00]
 0x00,0x00,0x6e,0xd8,0x00,0x00,0x00,0x00
@@ -3614,14 +3614,14 @@
 # GFX10: ds_gws_sema_br v0 offset:65535 gds ; encoding: [0xff,0xff,0x6e,0xd8,0x00,0x00,0x00,0x00]
 0xff,0xff,0x6e,0xd8,0x00,0x00,0x00,0x00
 
-# GFX10: ds_gws_sema_br v255 gds         ; encoding: [0x00,0x00,0x6e,0xd8,0x00,0xff,0x00,0x00]
-0x00,0x00,0x6e,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_sema_br v255 gds         ; encoding: [0x00,0x00,0x6e,0xd8,0xff,0x00,0x00,0x00]
+0x00,0x00,0x6e,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_sema_br v255 offset:4660 gds ; encoding: [0x34,0x12,0x6e,0xd8,0x00,0xff,0x00,0x00]
-0x34,0x12,0x6e,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_sema_br v255 offset:4660 gds ; encoding: [0x34,0x12,0x6e,0xd8,0xff,0x00,0x00,0x00]
+0x34,0x12,0x6e,0xd8,0xff,0x00,0x00,0x00
 
-# GFX10: ds_gws_sema_br v255 offset:65535 gds ; encoding: [0xff,0xff,0x6e,0xd8,0x00,0xff,0x00,0x00]
-0xff,0xff,0x6e,0xd8,0x00,0xff,0x00,0x00
+# GFX10: ds_gws_sema_br v255 offset:65535 gds ; encoding: [0xff,0xff,0x6e,0xd8,0xff,0x00,0x00,0x00]
+0xff,0xff,0x6e,0xd8,0xff,0x00,0x00,0x00
 
 # GFX10: ds_gws_sema_p  gds              ; encoding: [0x00,0x00,0x72,0xd8,0x00,0x00,0x00,0x00]
 0x00,0x00,0x72,0xd8,0x00,0x00,0x00,0x00

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt Mon Jul 15 07:37:57 2019
@@ -2268,17 +2268,17 @@
 # CHECK: ds_gws_sema_release_all offset:4 gds    ; encoding: [0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v255 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_init v255 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 gds    ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 gds    ; encoding: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 offset:4 gds    ; encoding: [0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 offset:4 gds    ; encoding: [0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_gws_sema_v offset:65535 gds    ; encoding: [0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00]
 0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00
@@ -2289,17 +2289,17 @@
 # CHECK: ds_gws_sema_v offset:4 gds    ; encoding: [0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v255 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_sema_br v255 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 gds    ; encoding: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 gds    ; encoding: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 offset:4 gds    ; encoding: [0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 offset:4 gds    ; encoding: [0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_gws_sema_p offset:65535 gds    ; encoding: [0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00]
 0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00
@@ -2310,17 +2310,17 @@
 # CHECK: ds_gws_sema_p offset:4 gds    ; encoding: [0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v255 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_barrier v255 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 gds    ; encoding: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 gds    ; encoding: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 offset:4 gds    ; encoding: [0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 offset:4 gds    ; encoding: [0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_consume v5 offset:65535    ; encoding: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05]
 0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt?rev=366067&r1=366066&r2=366067&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt Mon Jul 15 07:37:57 2019
@@ -2412,17 +2412,17 @@
 # CHECK: ds_gws_sema_release_all offset:4 gds    ; encoding: [0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v255 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x33,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_init v255 offset:65535 gds    ; encoding: [0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 gds    ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 gds    ; encoding: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_init v1 offset:4 gds    ; encoding: [0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x33,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_init v1 offset:4 gds    ; encoding: [0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_gws_sema_v offset:65535 gds    ; encoding: [0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00]
 0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00
@@ -2433,17 +2433,17 @@
 # CHECK: ds_gws_sema_v offset:4 gds    ; encoding: [0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v255 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x37,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_sema_br v255 offset:65535 gds    ; encoding: [0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 gds    ; encoding: [0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 gds    ; encoding: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_sema_br v1 offset:4 gds    ; encoding: [0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x37,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_sema_br v1 offset:4 gds    ; encoding: [0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_gws_sema_p offset:65535 gds    ; encoding: [0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00]
 0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00
@@ -2454,17 +2454,17 @@
 # CHECK: ds_gws_sema_p offset:4 gds    ; encoding: [0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
 0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0xff,0xff,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v255 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00]
-0xff,0xff,0x3b,0xd9,0x00,0xff,0x00,0x00
+# CHECK: ds_gws_barrier v255 offset:65535 gds    ; encoding: [0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00]
+0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 gds    ; encoding: [0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0x00,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 gds    ; encoding: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00
 
-# CHECK: ds_gws_barrier v1 offset:4 gds    ; encoding: [0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00]
-0x04,0x00,0x3b,0xd9,0x00,0x01,0x00,0x00
+# CHECK: ds_gws_barrier v1 offset:4 gds    ; encoding: [0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
+0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00
 
 # CHECK: ds_consume v5 offset:65535    ; encoding: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05]
 0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05




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