[PATCH] D64725: AMDGPU/GlobalISel: Select G_SHL

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle, alex-t, rampitec.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.

I think this manages to not break the DAG handling with the divergent
predicates because the stadalone divergent patterns end up with a
higher priority than the pattern on the instruction definition.

      

The 16-bit versions don't work yet.


https://reviews.llvm.org/D64725

Files:
  lib/Target/AMDGPU/SOPInstructions.td
  lib/Target/AMDGPU/VOP2Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir

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