[PATCH] D64721: AMDGPU/GlobalISel: Rewrite lowerFormalArguments

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 15 05:49:56 PDT 2019


arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle, aemerson, rovka.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

This should now handle everything except structs passed as multiple
registers.

      

I think most of the packing logic should be handled by
handleAssignments, but I'm unclear on what the contract is for
multiple registers. This is copying how x86 handles this.

      

This does change the behavior of the test_sgpr_alignment0 amdgpu_vs
test. I don't think shader arguments should try to follow the
alignment, and registers need to be repacked. I also don't think it
matters, since I think the pointers are packed to the beginning of the
argument list anyway.


https://reviews.llvm.org/D64721

Files:
  lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  lib/Target/AMDGPU/AMDGPUCallLowering.h
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
  test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D64721.209816.patch
Type: text/x-patch
Size: 160479 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190715/05a80ee5/attachment-0001.bin>


More information about the llvm-commits mailing list