[llvm] r366019 - [x86] add test for sub-with-flags opportunity (PR40483); NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 14 07:08:40 PDT 2019
Author: spatel
Date: Sun Jul 14 07:08:39 2019
New Revision: 366019
URL: http://llvm.org/viewvc/llvm-project?rev=366019&view=rev
Log:
[x86] add test for sub-with-flags opportunity (PR40483); NFC
Modified:
llvm/trunk/test/CodeGen/X86/combine-sbb.ll
Modified: llvm/trunk/test/CodeGen/X86/combine-sbb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sbb.ll?rev=366019&r1=366018&r2=366019&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sbb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sbb.ll Sun Jul 14 07:08:39 2019
@@ -280,7 +280,7 @@ define i32 @PR40483_sub4(i32*, i32) noun
; Verify that a bogus cmov is simplified.
-define i32 @PR40483_sub5(i32*, i32) {
+define i32 @PR40483_sub5(i32*, i32) nounwind {
; X86-LABEL: PR40483_sub5:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -306,4 +306,49 @@ define i32 @PR40483_sub5(i32*, i32) {
ret i32 %10
}
+define i32 @PR40483_sub6(i32*, i32) nounwind {
+; X86-LABEL: PR40483_sub6:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl (%edx), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl %esi, %ecx
+; X86-NEXT: subl %edi, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: subl %edi, %esi
+; X86-NEXT: movl %esi, (%edx)
+; X86-NEXT: jae .LBB8_2
+; X86-NEXT: # %bb.1:
+; X86-NEXT: addl %ecx, %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: .LBB8_2:
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl
+;
+; X64-LABEL: PR40483_sub6:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %ecx
+; X64-NEXT: movl %ecx, %edx
+; X64-NEXT: subl %esi, %edx
+; X64-NEXT: addl %edx, %edx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: subl %esi, %ecx
+; X64-NEXT: movl %ecx, (%rdi)
+; X64-NEXT: cmovbl %edx, %eax
+; X64-NEXT: retq
+ %3 = load i32, i32* %0, align 8
+ %4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)
+ %5 = extractvalue { i8, i32 } %4, 1
+ store i32 %5, i32* %0, align 8
+ %6 = extractvalue { i8, i32 } %4, 0
+ %7 = icmp eq i8 %6, 0
+ %8 = sub i32 %3, %1
+ %9 = add i32 %8, %5
+ %10 = select i1 %7, i32 0, i32 %9
+ ret i32 %10
+}
+
declare { i8, i32 } @llvm.x86.subborrow.32(i8, i32, i32)
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