[llvm] r365941 - [x86] add test for bogus cmov (PR40483); NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 12 11:38:29 PDT 2019


Author: spatel
Date: Fri Jul 12 11:38:29 2019
New Revision: 365941

URL: http://llvm.org/viewvc/llvm-project?rev=365941&view=rev
Log:
[x86] add test for bogus cmov (PR40483); NFC

Modified:
    llvm/trunk/test/CodeGen/X86/combine-sbb.ll

Modified: llvm/trunk/test/CodeGen/X86/combine-sbb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sbb.ll?rev=365941&r1=365940&r2=365941&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sbb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sbb.ll Fri Jul 12 11:38:29 2019
@@ -278,4 +278,33 @@ define i32 @PR40483_sub4(i32*, i32) noun
   ret i32 %10
 }
 
+; Verify that a bogus cmov is simplified.
+
+define i32 @PR40483_sub5(i32*, i32) {
+; X86-LABEL: PR40483_sub5:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    subl %eax, (%ecx)
+; X86-NEXT:    xorl %eax, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: PR40483_sub5:
+; X64:       # %bb.0:
+; X64-NEXT:    xorl %eax, %eax
+; X64-NEXT:    subl %esi, (%rdi)
+; X64-NEXT:    cmovael %eax, %eax
+; X64-NEXT:    retq
+  %3 = load i32, i32* %0, align 8
+  %4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)
+  %5 = extractvalue { i8, i32 } %4, 1
+  store i32 %5, i32* %0, align 8
+  %6 = extractvalue { i8, i32 } %4, 0
+  %7 = icmp eq i8 %6, 0
+  %8 = sub i32 %1, %3
+  %9 = add i32 %8, %5
+  %10 = select i1 %7, i32 %9, i32 0
+  ret i32 %10
+}
+
 declare { i8, i32 } @llvm.x86.subborrow.32(i8, i32, i32)




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