[llvm] r365837 - [AMDGPU] Fixed asan error with agpr spilling

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 11 15:30:11 PDT 2019


Author: rampitec
Date: Thu Jul 11 15:30:11 2019
New Revision: 365837

URL: http://llvm.org/viewvc/llvm-project?rev=365837&view=rev
Log:
[AMDGPU] Fixed asan error with agpr spilling

Instruction was used after it was erased.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SILowerSGPRSpills.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILowerSGPRSpills.cpp?rev=365837&r1=365836&r2=365837&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SILowerSGPRSpills.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SILowerSGPRSpills.cpp Thu Jul 11 15:30:11 2019
@@ -283,8 +283,11 @@ bool SILowerSGPRSpills::runOnMachineFunc
           int FI = MI.getOperand(FIOp).getIndex();
           unsigned VReg = TII->getNamedOperand(MI, AMDGPU::OpName::vdata)
             ->getReg();
-          if (FuncInfo->allocateVGPRSpillToAGPR(MF, FI, TRI->isAGPR(MRI, VReg)))
+          if (FuncInfo->allocateVGPRSpillToAGPR(MF, FI,
+                                                TRI->isAGPR(MRI, VReg))) {
             TRI->eliminateFrameIndex(MI, 0, FIOp, nullptr);
+            continue;
+          }
         }
 
         if (!TII->isSGPRSpill(MI))




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