[PATCH] D64192: [MachinePipeliner] Fix order for nodes with Anti dependence in same cycle

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added inline comments.


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:3563
+      // We did not handle HW dependences in previous for loop,
+      // and we normally set Latency =0 for Anti deps,
+      // so may have nodes in same cycle with Anti denpendent on HW regs
----------------
  = 0

(insert space)


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:3564
+      // and we normally set Latency =0 for Anti deps,
+      // so may have nodes in same cycle with Anti denpendent on HW regs
+      else if (S.getKind() == SDep::Anti && stageScheduled(*I) == StageInst1) {
----------------
End comments with a period.


================
Comment at: llvm/lib/CodeGen/MachinePipeliner.cpp:3567
+        OrderBeforeUse = true;
+        if((MoveUse == 0)||(Pos < MoveUse))
+          MoveUse = Pos;
----------------
space after if and space around ||


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64192/new/

https://reviews.llvm.org/D64192