[PATCH] D64485: [MIPS GlobalISel] RegBankSelect for chains of ambiguous instructions

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: atanasyan, petarj.
Herald added subscribers: llvm-commits, jrtc27, arichardson, rovka, sdardis.
Herald added a project: LLVM.

When one of the uses/defs of ambiguous instruction is also ambiguous
visit it recursively and search its uses/defs for instruction with
only one mapping available.
When all instruction in a chain are ambiguous arbitrary mapping can
be selected. For s64 operands in ambiguous chain fprb is selected since
it results in less instructions then having to narrow scalar s64 to s32.
For s32 both gprb and fprb result in same number of instructions and
gprb is selected like a general purpose option.

At the moment we always avoid cross register bank copies.
TODO: Implement a model for costs calculations of different mappings
on same instruction and cross bank copies. Allow cross bank copies
when appropriate according to cost model.


Repository:
  rL LLVM

https://reviews.llvm.org/D64485

Files:
  lib/Target/Mips/MipsRegisterBankInfo.cpp
  lib/Target/Mips/MipsRegisterBankInfo.h
  test/CodeGen/Mips/GlobalISel/llvm-ir/load.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll
  test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
  test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
  test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
  test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir
  test/CodeGen/Mips/GlobalISel/regbankselect/select.mir
  test/CodeGen/Mips/GlobalISel/regbankselect/test_TypeInfoforMF.mir

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