[llvm] r365583 - GlobalISel: Implement lower for G_FCOPYSIGN
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 9 16:34:29 PDT 2019
Author: arsenm
Date: Tue Jul 9 16:34:29 2019
New Revision: 365583
URL: http://llvm.org/viewvc/llvm-project?rev=365583&view=rev
Log:
GlobalISel: Implement lower for G_FCOPYSIGN
In SelectionDAG AMDGPU treated these as legal, but this was mostly
because the bitcasts required for FP types were painful. Theoretically
the bitpattern should eventually match to bfi, so don't bother trying
to get the patterns to import.
Modified:
llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h?rev=365583&r1=365582&r2=365583&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h Tue Jul 9 16:34:29 2019
@@ -219,6 +219,7 @@ private:
LegalizeResult lowerUITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerSITOFP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult lowerMinMax(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
+ LegalizeResult lowerFCopySign(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
MachineRegisterInfo &MRI;
const LegalizerInfo &LI;
Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=365583&r1=365582&r2=365583&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Tue Jul 9 16:34:29 2019
@@ -1694,6 +1694,8 @@ LegalizerHelper::lower(MachineInstr &MI,
case G_UMIN:
case G_UMAX:
return lowerMinMax(MI, TypeIdx, Ty);
+ case G_FCOPYSIGN:
+ return lowerFCopySign(MI, TypeIdx, Ty);
}
}
@@ -3222,4 +3224,52 @@ LegalizerHelper::lowerMinMax(MachineInst
MI.eraseFromParent();
return Legalized;
+}
+
+LegalizerHelper::LegalizeResult
+LegalizerHelper::lowerFCopySign(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
+ Register Dst = MI.getOperand(0).getReg();
+ Register Src0 = MI.getOperand(1).getReg();
+ Register Src1 = MI.getOperand(2).getReg();
+
+ const LLT Src0Ty = MRI.getType(Src0);
+ const LLT Src1Ty = MRI.getType(Src1);
+
+ const int Src0Size = Src0Ty.getScalarSizeInBits();
+ const int Src1Size = Src1Ty.getScalarSizeInBits();
+
+ auto SignBitMask = MIRBuilder.buildConstant(
+ Src0Ty, APInt::getSignMask(Src0Size));
+
+ auto NotSignBitMask = MIRBuilder.buildConstant(
+ Src0Ty, APInt::getLowBitsSet(Src0Size, Src0Size - 1));
+
+ auto And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask);
+ MachineInstr *Or;
+
+ if (Src0Ty == Src1Ty) {
+ auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask);
+ Or = MIRBuilder.buildOr(Dst, And0, And1);
+ } else if (Src0Size > Src1Size) {
+ auto ShiftAmt = MIRBuilder.buildConstant(Src0Ty, Src0Size - Src1Size);
+ auto Zext = MIRBuilder.buildZExt(Src0Ty, Src1);
+ auto Shift = MIRBuilder.buildShl(Src0Ty, Zext, ShiftAmt);
+ auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask);
+ Or = MIRBuilder.buildOr(Dst, And0, And1);
+ } else {
+ auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size);
+ auto Shift = MIRBuilder.buildLShr(Src1Ty, Src1, ShiftAmt);
+ auto Trunc = MIRBuilder.buildTrunc(Src0Ty, Shift);
+ auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask);
+ Or = MIRBuilder.buildOr(Dst, And0, And1);
+ }
+
+ // Be careful about setting nsz/nnan/ninf on every instruction, since the
+ // constants are a nan and -0.0, but the final result should preserve
+ // everything.
+ if (unsigned Flags = MI.getFlags())
+ Or->setFlags(Flags);
+
+ MI.eraseFromParent();
+ return Legalized;
}
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=365583&r1=365582&r2=365583&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Tue Jul 9 16:34:29 2019
@@ -298,9 +298,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
.lowerFor({{S64, S16}}) // FIXME: Implement
.scalarize(0);
- getActionDefinitionsBuilder(G_FCOPYSIGN)
- .legalForCartesianProduct({S16, S32, S64}, {S16, S32, S64})
- .scalarize(0);
+ // TODO: Verify V_BFI_B32 is generated from expanded bit ops.
+ getActionDefinitionsBuilder(G_FCOPYSIGN).lower();
getActionDefinitionsBuilder(G_FSUB)
// Use actual fsub instruction
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir?rev=365583&r1=365582&r2=365583&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir Tue Jul 9 16:34:29 2019
@@ -1,7 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s
---
name: test_copysign_s16_s16
@@ -12,27 +12,48 @@ body: |
; SI-LABEL: name: test_copysign_s16_s16
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16)
- ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
+ ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; SI: $vgpr0 = COPY [[COPY7]](s32)
; VI-LABEL: name: test_copysign_s16_s16
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16)
- ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
+ ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; VI: $vgpr0 = COPY [[COPY7]](s32)
; GFX9-LABEL: name: test_copysign_s16_s16
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[TRUNC1]](s16)
- ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY4]]
+ ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; GFX9: $vgpr0 = COPY [[COPY7]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
@@ -51,18 +72,30 @@ body: |
; SI-LABEL: name: test_copysign_s32_s32
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s32
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s32
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = G_FCOPYSIGN %0, %1
@@ -78,18 +111,30 @@ body: |
; SI-LABEL: name: test_copysign_s64_s64
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s64
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s64
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = COPY $vgpr2_vgpr3
%2:_(s64) = G_FCOPYSIGN %0, %1
@@ -105,18 +150,42 @@ body: |
; SI-LABEL: name: test_copysign_s64_s32
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s32
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s32
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[COPY1]](s32)
- ; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY1]](s32)
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[TRUNC]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s64) = G_FCOPYSIGN %0, %1
@@ -132,18 +201,42 @@ body: |
; SI-LABEL: name: test_copysign_s32_s64
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s64
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s64
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[COPY1]](s64)
- ; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = COPY $vgpr1_vgpr2
%2:_(s32) = G_FCOPYSIGN %0, %1
@@ -159,24 +252,57 @@ body: |
; SI-LABEL: name: test_copysign_s16_s32
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32)
- ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
+ ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; SI: $vgpr0 = COPY [[COPY8]](s32)
; VI-LABEL: name: test_copysign_s16_s32
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32)
- ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
+ ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; VI: $vgpr0 = COPY [[COPY8]](s32)
; GFX9-LABEL: name: test_copysign_s16_s32
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s32)
- ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY6]], [[COPY7]]
+ ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; GFX9: $vgpr0 = COPY [[COPY8]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
@@ -194,21 +320,45 @@ body: |
; SI-LABEL: name: test_copysign_s32_s16
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; SI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
+ ; SI: $vgpr0 = COPY [[OR]](s32)
; VI-LABEL: name: test_copysign_s32_s16
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; VI: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
+ ; VI: $vgpr0 = COPY [[OR]](s32)
; GFX9-LABEL: name: test_copysign_s32_s16
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; GFX9: $vgpr0 = COPY [[FCOPYSIGN]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[AND2]]
+ ; GFX9: $vgpr0 = COPY [[OR]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %1
@@ -225,21 +375,48 @@ body: |
; SI-LABEL: name: test_copysign_s64_s16
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; SI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
+ ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
+ ; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; SI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; VI-LABEL: name: test_copysign_s64_s16
; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; VI: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
+ ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
+ ; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; VI: $vgpr0_vgpr1 = COPY [[OR]](s64)
; GFX9-LABEL: name: test_copysign_s64_s16
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[COPY]], [[TRUNC]](s16)
- ; GFX9: $vgpr0_vgpr1 = COPY [[FCOPYSIGN]](s64)
+ ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
+ ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY1]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C3]]
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[AND1]], [[TRUNC]](s32)
+ ; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; GFX9: $vgpr0_vgpr1 = COPY [[OR]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s16) = G_TRUNC %1
@@ -256,24 +433,60 @@ body: |
; SI-LABEL: name: test_copysign_s16_s64
; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64)
- ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
+ ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; SI: $vgpr0 = COPY [[COPY7]](s32)
; VI-LABEL: name: test_copysign_s16_s64
; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64)
- ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
+ ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; VI: $vgpr0 = COPY [[COPY7]](s32)
; GFX9-LABEL: name: test_copysign_s16_s64
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr1_vgpr2
- ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[TRUNC]], [[COPY1]](s64)
- ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FCOPYSIGN]](s16)
- ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[TRUNC]](s32)
+ ; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
+ ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[COPY4]]
+ ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY5]], [[COPY6]]
+ ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
+ ; GFX9: $vgpr0 = COPY [[COPY7]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = COPY $vgpr1_vgpr2
%2:_(s16) = G_TRUNC %0
@@ -291,30 +504,42 @@ body: |
; SI-LABEL: name: test_copysign_v2s16_v2s16
; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
- ; SI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
- ; SI: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16)
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16)
- ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16)
- ; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
+ ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
+ ; SI: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; SI: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; SI: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0 = COPY [[OR]](<2 x s16>)
; VI-LABEL: name: test_copysign_v2s16_v2s16
; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
- ; VI: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
- ; VI: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16)
- ; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16)
- ; VI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
+ ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
+ ; VI: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; VI: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; VI: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0 = COPY [[OR]](<2 x s16>)
; GFX9-LABEL: name: test_copysign_v2s16_v2s16
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
- ; GFX9: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
- ; GFX9: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV]], [[UV2]](s16)
- ; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s16) = G_FCOPYSIGN [[UV1]], [[UV3]](s16)
- ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[FCOPYSIGN]](s16), [[FCOPYSIGN1]](s16)
- ; GFX9: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
+ ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC]](s16)
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
+ ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[TRUNC1]](s16)
+ ; GFX9: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; GFX9: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0 = COPY [[OR]](<2 x s16>)
%0:_(<2 x s16>) = COPY $vgpr0
%1:_(<2 x s16>) = COPY $vgpr1
%2:_(<2 x s16>) = G_FCOPYSIGN %0, %1
@@ -330,30 +555,36 @@ body: |
; SI-LABEL: name: test_copysign_v2s32_v2s32
; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
- ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; SI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; SI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; VI-LABEL: name: test_copysign_v2s32_v2s32
; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
- ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; VI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; VI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; GFX9-LABEL: name: test_copysign_v2s32_v2s32
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
- ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR]]
+ ; GFX9: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(<2 x s32>) = COPY $vgpr2_vgpr3
%2:_(<2 x s32>) = G_FCOPYSIGN %0, %1
@@ -369,29 +600,47 @@ body: |
; SI-LABEL: name: test_copysign_v2s64_v2s64
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
+ ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
- ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
+ ; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
; VI-LABEL: name: test_copysign_v2s64_v2s64
; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
+ ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
- ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
+ ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
+ ; VI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
; GFX9-LABEL: name: test_copysign_v2s64_v2s64
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
+ ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
- ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
+ ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[UV2]], [[C]]
+ ; GFX9: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV3]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
@@ -408,30 +657,75 @@ body: |
; SI-LABEL: name: test_copysign_v2s64_v2s32
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
+ ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
- ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
+ ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
+ ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
+ ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
+ ; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
+ ; SI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
+ ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
; VI-LABEL: name: test_copysign_v2s64_v2s32
; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
+ ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; VI: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; VI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
- ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
+ ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
+ ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
+ ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
+ ; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
+ ; VI: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; VI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
+ ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
+ ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
; GFX9-LABEL: name: test_copysign_v2s64_v2s32
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
+ ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
+ ; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV]], [[UV2]](s32)
- ; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[UV1]], [[UV3]](s32)
- ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FCOPYSIGN]](s64), [[FCOPYSIGN1]](s64)
- ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
+ ; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)
+ ; GFX9: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)
+ ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)
+ ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>)
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32)
+ ; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC1]](s32)
+ ; GFX9: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SHL]], [[C]]
+ ; GFX9: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SHL1]], [[C]]
+ ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND2]]
+ ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[AND1]], [[AND3]]
+ ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
+ ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR1]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s32>) = COPY $vgpr4_vgpr5
%2:_(<2 x s64>) = G_FCOPYSIGN %0, %1
@@ -448,32 +742,225 @@ body: |
; SI-LABEL: name: test_copysign_v2s32_v2s64
; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; SI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
- ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
+ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
+ ; SI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
+ ; SI: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
+ ; SI: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
+ ; SI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
+ ; SI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; VI-LABEL: name: test_copysign_v2s32_v2s64
; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; VI: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
- ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; VI: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; VI: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
+ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
+ ; VI: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
+ ; VI: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
+ ; VI: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
+ ; VI: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
+ ; VI: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
; GFX9-LABEL: name: test_copysign_v2s32_v2s64
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
- ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
- ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
- ; GFX9: [[FCOPYSIGN:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV]], [[UV2]](s64)
- ; GFX9: [[FCOPYSIGN1:%[0-9]+]]:_(s32) = G_FCOPYSIGN [[UV1]], [[UV3]](s64)
- ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FCOPYSIGN]](s32), [[FCOPYSIGN1]](s32)
- ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[BUILD_VECTOR1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
+ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32)
+ ; GFX9: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C2]](s64)
+ ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC1]](s32)
+ ; GFX9: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LSHR]](s64), [[LSHR1]](s64)
+ ; GFX9: [[TRUNC2:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s64>)
+ ; GFX9: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[TRUNC2]], [[BUILD_VECTOR]]
+ ; GFX9: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0_vgpr1 = COPY [[OR]](<2 x s32>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(<2 x s64>) = COPY $vgpr2_vgpr3_vgpr4_vgpr5
%2:_(<2 x s32>) = G_FCOPYSIGN %0, %1
$vgpr0_vgpr1 = COPY %2
...
+
+---
+name: test_copysign_s32_s32_flagss
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; SI-LABEL: name: test_copysign_s32_s32_flagss
+ ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; SI: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
+ ; SI: $vgpr0 = COPY %2(s32)
+ ; VI-LABEL: name: test_copysign_s32_s32_flagss
+ ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; VI: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
+ ; VI: $vgpr0 = COPY %2(s32)
+ ; GFX9-LABEL: name: test_copysign_s32_s32_flagss
+ ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; GFX9: %2:_(s32) = nnan G_OR [[AND]], [[AND1]]
+ ; GFX9: $vgpr0 = COPY %2(s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = nnan G_FCOPYSIGN %0, %1
+ $vgpr0 = COPY %2
+...
+
+
+---
+name: test_copysign_s32_s16_flags
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+ ; SI-LABEL: name: test_copysign_s32_s16_flags
+ ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; SI: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
+ ; SI: $vgpr0 = COPY %3(s32)
+ ; VI-LABEL: name: test_copysign_s32_s16_flags
+ ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; VI: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
+ ; VI: $vgpr0 = COPY %3(s32)
+ ; GFX9-LABEL: name: test_copysign_s32_s16_flags
+ ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
+ ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32)
+ ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SHL]], [[C]]
+ ; GFX9: %3:_(s32) = nnan G_OR [[AND]], [[AND2]]
+ ; GFX9: $vgpr0 = COPY %3(s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s16) = G_TRUNC %1
+ %3:_(s32) = nnan G_FCOPYSIGN %0, %2
+ $vgpr0 = COPY %3
+...
+
+
+---
+name: test_copysign_s16_s32_flags
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; SI-LABEL: name: test_copysign_s16_s32_flags
+ ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; SI: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
+ ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
+ ; SI: $vgpr0 = COPY [[COPY8]](s32)
+ ; VI-LABEL: name: test_copysign_s16_s32_flags
+ ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; VI: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
+ ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
+ ; VI: $vgpr0 = COPY [[COPY8]](s32)
+ ; GFX9-LABEL: name: test_copysign_s16_s32_flags
+ ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
+ ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
+ ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
+ ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
+ ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
+ ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[COPY5]]
+ ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
+ ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[AND1]](s32)
+ ; GFX9: %14:_(s32) = nnan G_OR [[COPY6]], [[COPY7]]
+ ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY %14(s32)
+ ; GFX9: $vgpr0 = COPY [[COPY8]](s32)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s16) = G_TRUNC %0
+ %3:_(s16) = nnan G_FCOPYSIGN %2, %1
+ %4:_(s32) = G_ANYEXT %3
+ $vgpr0 = COPY %4
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir?rev=365583&r1=365582&r2=365583&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir Tue Jul 9 16:34:29 2019
@@ -57,13 +57,17 @@ body: |
; SI-LABEL: name: test_frint_s64
; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[COPY]](s64)
- ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[FCOPYSIGN]]
- ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN]]
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[OR]]
+ ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
- ; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
+ ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]]
- ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]]
+ ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[COPY]], [[FADD1]]
; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[COPY]]
; SI: $vgpr0_vgpr1 = COPY [[FRINT]](s64)
@@ -128,21 +132,25 @@ body: |
; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x4330000000000000
- ; SI: [[FCOPYSIGN:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[UV]](s64)
- ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[FCOPYSIGN]]
- ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN]]
+ ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
+ ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
+ ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C]], [[C1]]
+ ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[AND]], [[AND1]]
+ ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[OR]](s64)
+ ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[UV]], [[COPY1]]
+ ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[COPY1]]
; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FADD]], [[FNEG]]
- ; SI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
+ ; SI: [[C3:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x432FFFFFFFFFFFFF
; SI: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[UV]]
- ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C1]]
+ ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[UV]], [[FADD1]]
; SI: [[FRINT:%[0-9]+]]:_(s64) = G_FRINT [[UV]]
- ; SI: [[FCOPYSIGN1:%[0-9]+]]:_(s64) = G_FCOPYSIGN [[C]], [[UV1]](s64)
- ; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[FCOPYSIGN1]]
- ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[FCOPYSIGN1]]
+ ; SI: [[FADD2:%[0-9]+]]:_(s64) = G_FADD [[UV1]], [[OR]]
+ ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[OR]]
; SI: [[FADD3:%[0-9]+]]:_(s64) = G_FADD [[FADD2]], [[FNEG1]]
; SI: [[FABS1:%[0-9]+]]:_(s64) = G_FABS [[UV1]]
- ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C1]]
+ ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[FABS1]](s64), [[C3]]
; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[UV1]], [[FADD3]]
; SI: [[FRINT1:%[0-9]+]]:_(s64) = G_FRINT [[UV1]]
; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FRINT]](s64), [[FRINT1]](s64)
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