[llvm] r365573 - [AMDGPU] gfx908 v_pk_fmac_f16 support

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 9 15:42:25 PDT 2019 

Author: rampitec
Date: Tue Jul  9 15:42:24 2019
New Revision: 365573

URL: http://llvm.org/viewvc/llvm-project?rev=365573&view=rev
Log:
[AMDGPU] gfx908 v_pk_fmac_f16 support

Differential Revision: https://reviews.llvm.org/D64433

Added:
    llvm/trunk/test/MC/AMDGPU/xdl-insts-gfx908.s
    llvm/trunk/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
    llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.td?rev=365573&r1=365572&r2=365573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.td Tue Jul  9 15:42:24 2019
@@ -666,8 +666,8 @@ def FeatureGFX10 : GCNSubtargetFeatureGe
    FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
    FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
    FeatureNoSdstCMPX, FeatureVscnt, FeatureRegisterBanking,
-   FeatureVOP3Literal, FeatureDPP8, FeatureNoDataDepHazard,
-   FeatureDoesNotSupportSRAMECC
+   FeatureVOP3Literal, FeatureDPP8,
+   FeatureNoDataDepHazard, FeaturePkFmacF16Inst, FeatureDoesNotSupportSRAMECC
   ]
 >;
 

Modified: llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td?rev=365573&r1=365572&r2=365573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td Tue Jul  9 15:42:24 2019
@@ -694,10 +694,12 @@ let Constraints = "$vdst = $src2",
 defm V_FMAC_F16 : VOP2Inst <"v_fmac_f16", VOP_MAC_F16>;
 }
 
-defm V_PK_FMAC_F16 : VOP2Inst<"v_pk_fmac_f16", VOP_V2F16_V2F16_V2F16>;
-
 } // End SubtargetPredicate = isGFX10Plus
 
+let SubtargetPredicate = HasPkFmacF16Inst in {
+defm V_PK_FMAC_F16 : VOP2Inst<"v_pk_fmac_f16", VOP_V2F16_V2F16_V2F16>;
+} // End SubtargetPredicate = HasPkFmacF16Inst
+
 // Note: 16-bit instructions produce a 0 result in the high 16-bits
 // on GFX8 and GFX9 and preserve high 16 bits on GFX10+
 def ClearHI16 : OutPatFrag<(ops node:$op),
@@ -1548,3 +1550,7 @@ let SubtargetPredicate = HasDot5Insts in
 let SubtargetPredicate = HasDot6Insts in {
   defm V_DOT4C_I32_I8  : VOP2_Real_DOT_ACC_gfx10<0x0d>;
 }
+
+let SubtargetPredicate = HasPkFmacF16Inst in {
+defm V_PK_FMAC_F16 : VOP2_Real_e32_vi<0x3c>;
+} // End SubtargetPredicate = HasPkFmacF16Inst

Added: llvm/trunk/test/MC/AMDGPU/xdl-insts-gfx908.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/xdl-insts-gfx908.s?rev=365573&view=auto
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/xdl-insts-gfx908.s (added)
+++ llvm/trunk/test/MC/AMDGPU/xdl-insts-gfx908.s Tue Jul  9 15:42:24 2019
@@ -0,0 +1,46 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s | FileCheck %s
+
+// CHECK: encoding: [0x01,0x05,0x0a,0x78]
+v_pk_fmac_f16 v5, v1, v2
+
+// CHECK: encoding: [0x01,0x05,0xfe,0x79]
+v_pk_fmac_f16 v255, v1, v2
+
+// CHECK: encoding: [0xff,0x05,0x0a,0x78]
+v_pk_fmac_f16 v5, v255, v2
+
+// CHECK: encoding: [0x01,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, s1, v2
+
+// CHECK: encoding: [0x6a,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, vcc_lo, v2
+
+// CHECK: encoding: [0x6b,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, vcc_hi, v2
+
+// CHECK: encoding: [0x77,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, ttmp11, v2
+
+// CHECK: encoding: [0x7c,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, m0, v2
+
+// CHECK: encoding: [0x7e,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, exec_lo, v2
+
+// CHECK: encoding: [0x7f,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, exec_hi, v2
+
+// CHECK: encoding: [0x80,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, 0, v2
+
+// CHECK: encoding: [0xc1,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, -1, v2
+
+// CHECK: encoding: [0xf0,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, 0.5, v2
+
+// CHECK: encoding: [0xf7,0x04,0x0a,0x78]
+v_pk_fmac_f16 v5, -4.0, v2
+
+// CHECK: encoding: [0x01,0xff,0x0b,0x78]
+v_pk_fmac_f16 v5, v1, v255

Added: llvm/trunk/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt?rev=365573&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt Tue Jul  9 15:42:24 2019
@@ -0,0 +1,46 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
+
+# CHECK: v_pk_fmac_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x78]
+0x01,0x05,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x79]
+0x01,0x05,0xfe,0x79
+
+# CHECK: v_pk_fmac_f16_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x78]
+0xff,0x05,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x78]
+0x01,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x78]
+0x6a,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x78]
+0x6b,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, ttmp11, v2 ; encoding: [0x77,0x04,0x0a,0x78]
+0x77,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, m0, v2 ; encoding: [0x7c,0x04,0x0a,0x78]
+0x7c,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, exec_lo, v2 ; encoding: [0x7e,0x04,0x0a,0x78]
+0x7e,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, exec_hi, v2 ; encoding: [0x7f,0x04,0x0a,0x78]
+0x7f,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, 0, v2 ; encoding: [0x80,0x04,0x0a,0x78]
+0x80,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, -1, v2 ; encoding: [0xc1,0x04,0x0a,0x78]
+0xc1,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, 0.5, v2 ; encoding: [0xf0,0x04,0x0a,0x78]
+0xf0,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, -4.0, v2 ; encoding: [0xf7,0x04,0x0a,0x78]
+0xf7,0x04,0x0a,0x78
+
+# CHECK: v_pk_fmac_f16_e32 v5, v1, v255 ; encoding: [0x01,0xff,0x0b,0x78]
+0x01,0xff,0x0b,0x78

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