[PATCH] D64295: [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it

Phabricator via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 9 12:56:30 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rL365549: [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into… (authored by ctopper, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D64295?vs=208595&id=208787#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64295/new/

https://reviews.llvm.org/D64295

Files:
  llvm/trunk/include/llvm/CodeGen/TargetLowering.h
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.h
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.h
  llvm/trunk/test/CodeGen/X86/merge-consecutive-stores-nt.ll
  llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.ll

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