[PATCH] D64421: [unittest] Add bogus register info.
Michael Liao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 9 10:18:52 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL365516: [unittest] Add bogus register info. (authored by hliao, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D64421?vs=208692&id=208732#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64421/new/
https://reviews.llvm.org/D64421
Files:
llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
Index: llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
===================================================================
--- llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
+++ llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
@@ -44,6 +44,55 @@
bool hasFP(const MachineFunction &MF) const override { return false; }
};
+static TargetRegisterClass *const BogusRegisterClasses[] = {nullptr};
+
+class BogusRegisterInfo : public TargetRegisterInfo {
+public:
+ BogusRegisterInfo()
+ : TargetRegisterInfo(nullptr, BogusRegisterClasses, BogusRegisterClasses,
+ nullptr, nullptr, LaneBitmask(~0u), nullptr) {}
+
+ const MCPhysReg *
+ getCalleeSavedRegs(const MachineFunction *MF) const override {
+ return nullptr;
+ }
+ ArrayRef<const uint32_t *> getRegMasks() const override { return None; }
+ ArrayRef<const char *> getRegMaskNames() const override { return None; }
+ BitVector getReservedRegs(const MachineFunction &MF) const override {
+ return BitVector();
+ }
+ const RegClassWeight &
+ getRegClassWeight(const TargetRegisterClass *RC) const override {
+ static RegClassWeight Bogus{1, 16};
+ return Bogus;
+ }
+ unsigned getRegUnitWeight(unsigned RegUnit) const override { return 1; }
+ unsigned getNumRegPressureSets() const override { return 0; }
+ const char *getRegPressureSetName(unsigned Idx) const override {
+ return "bogus";
+ }
+ unsigned getRegPressureSetLimit(const MachineFunction &MF,
+ unsigned Idx) const override {
+ return 0;
+ }
+ const int *
+ getRegClassPressureSets(const TargetRegisterClass *RC) const override {
+ static const int Bogus[] = {0, -1};
+ return &Bogus[0];
+ }
+ const int *getRegUnitPressureSets(unsigned RegUnit) const override {
+ static const int Bogus[] = {0, -1};
+ return &Bogus[0];
+ }
+
+ Register getFrameRegister(const MachineFunction &MF) const override {
+ return 0;
+ }
+ void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
+ unsigned FIOperandNum,
+ RegScavenger *RS = nullptr) const override {}
+};
+
class BogusSubtarget : public TargetSubtargetInfo {
public:
BogusSubtarget(TargetMachine &TM)
@@ -58,8 +107,11 @@
const TargetInstrInfo *getInstrInfo() const override { return &TII; }
+ const TargetRegisterInfo *getRegisterInfo() const override { return &TRI; }
+
private:
BogusFrameLowering FL;
+ BogusRegisterInfo TRI;
BogusTargetLowering TL;
TargetInstrInfo TII;
};
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