[PATCH] D64353: [AMDGPU] Run '' after isel to simplify PHIs.

[Michael Liao via Phabricator via llvm-commits]

hliao added a comment.

cf.end and related MBB prologue instructions should not take PHIs as input. Before LCSSA is turned on, we won't have that IR. After LCSSA, the only possible PHI input is the one from non-latch loop single exit. That PHI is unnecessary and should be removed early to assure that the later passes could relies on the fact they cf.end and etc. won't take PHI as input.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64353/new/

https://reviews.llvm.org/D64353