[PATCH] D63411: [RISCV] Specify registers used in DWARF exception handling

[Alex Bradbury via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL365301: [RISCV] Specify registers used in DWARF exception handling (authored by asb, committed by ).
Herald added subscribers: lenary, MaskRay.

Changed prior to commit:
  https://reviews.llvm.org/D63411?vs=207767&id=208333#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63411/new/

https://reviews.llvm.org/D63411

Files:
  llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/trunk/lib/Target/RISCV/RISCVISelLowering.h
  llvm/trunk/test/CodeGen/RISCV/exception-pointer-register.ll

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