[llvm] r365274 - [CodeGen] Add larger vector types for i32 and f32
David Majnemer via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 6 21:47:37 PDT 2019
Author: majnemer
Date: Sat Jul 6 21:47:37 2019
New Revision: 365274
URL: http://llvm.org/viewvc/llvm-project?rev=365274&view=rev
Log:
[CodeGen] Add larger vector types for i32 and f32
Some out of tree backend require larger vector type. Since maintaining the changes out of tree is difficult due to the many manual changes needed when adding a new type we are adding it even if no backend currently use it.
Differential Revision: https://reviews.llvm.org/D64141
Patch by Thomas Raoux!
Modified:
llvm/trunk/include/llvm/CodeGen/ValueTypes.td
llvm/trunk/include/llvm/Support/MachineValueType.h
llvm/trunk/lib/CodeGen/ValueTypes.cpp
llvm/trunk/test/TableGen/intrinsic-varargs.td
llvm/trunk/utils/TableGen/CodeGenTarget.cpp
Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.td?rev=365274&r1=365273&r2=365274&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ValueTypes.td (original)
+++ llvm/trunk/include/llvm/CodeGen/ValueTypes.td Sat Jul 6 21:47:37 2019
@@ -62,93 +62,105 @@ def v32i16 : ValueType<512, 38>; // 32
def v64i16 : ValueType<1024,39>; // 64 x i16 vector value
def v128i16: ValueType<2048,40>; //128 x i16 vector value
-def v1i32 : ValueType<32 , 41>; // 1 x i32 vector value
-def v2i32 : ValueType<64 , 42>; // 2 x i32 vector value
-def v3i32 : ValueType<96 , 43>; // 3 x i32 vector value
-def v4i32 : ValueType<128, 44>; // 4 x i32 vector value
-def v5i32 : ValueType<160, 45>; // 5 x i32 vector value
-def v8i32 : ValueType<256, 46>; // 8 x i32 vector value
-def v16i32 : ValueType<512, 47>; // 16 x i32 vector value
-def v32i32 : ValueType<1024,48>; // 32 x i32 vector value
-def v64i32 : ValueType<2048,49>; // 64 x i32 vector value
-
-def v1i64 : ValueType<64 , 50>; // 1 x i64 vector value
-def v2i64 : ValueType<128, 51>; // 2 x i64 vector value
-def v4i64 : ValueType<256, 52>; // 4 x i64 vector value
-def v8i64 : ValueType<512, 53>; // 8 x i64 vector value
-def v16i64 : ValueType<1024,54>; // 16 x i64 vector value
-def v32i64 : ValueType<2048,55>; // 32 x i64 vector value
-
-def v1i128 : ValueType<128, 56>; // 1 x i128 vector value
-
-def nxv1i1 : ValueType<1, 57>; // n x 1 x i1 vector value
-def nxv2i1 : ValueType<2, 58>; // n x 2 x i1 vector value
-def nxv4i1 : ValueType<4, 59>; // n x 4 x i1 vector value
-def nxv8i1 : ValueType<8, 60>; // n x 8 x i1 vector value
-def nxv16i1 : ValueType<16, 61>; // n x 16 x i1 vector value
-def nxv32i1 : ValueType<32, 62>; // n x 32 x i1 vector value
-
-def nxv1i8 : ValueType<8, 63>; // n x 1 x i8 vector value
-def nxv2i8 : ValueType<16, 64>; // n x 2 x i8 vector value
-def nxv4i8 : ValueType<32, 65>; // n x 4 x i8 vector value
-def nxv8i8 : ValueType<64, 66>; // n x 8 x i8 vector value
-def nxv16i8 : ValueType<128, 67>; // n x 16 x i8 vector value
-def nxv32i8 : ValueType<256, 68>; // n x 32 x i8 vector value
-
-def nxv1i16 : ValueType<16, 69>; // n x 1 x i16 vector value
-def nxv2i16 : ValueType<32, 70>; // n x 2 x i16 vector value
-def nxv4i16 : ValueType<64, 71>; // n x 4 x i16 vector value
-def nxv8i16 : ValueType<128, 72>; // n x 8 x i16 vector value
-def nxv16i16: ValueType<256, 73>; // n x 16 x i16 vector value
-def nxv32i16: ValueType<512, 74>; // n x 32 x i16 vector value
-
-def nxv1i32 : ValueType<32, 75>; // n x 1 x i32 vector value
-def nxv2i32 : ValueType<64, 76>; // n x 2 x i32 vector value
-def nxv4i32 : ValueType<128, 77>; // n x 4 x i32 vector value
-def nxv8i32 : ValueType<256, 78>; // n x 8 x i32 vector value
-def nxv16i32: ValueType<512, 79>; // n x 16 x i32 vector value
-def nxv32i32: ValueType<1024,80>; // n x 32 x i32 vector value
-
-def nxv1i64 : ValueType<64, 81>; // n x 1 x i64 vector value
-def nxv2i64 : ValueType<128, 82>; // n x 2 x i64 vector value
-def nxv4i64 : ValueType<256, 83>; // n x 4 x i64 vector value
-def nxv8i64 : ValueType<512, 84>; // n x 8 x i64 vector value
-def nxv16i64: ValueType<1024,85>; // n x 16 x i64 vector value
-def nxv32i64: ValueType<2048,86>; // n x 32 x i64 vector value
-
-def v2f16 : ValueType<32 , 87>; // 2 x f16 vector value
-def v4f16 : ValueType<64 , 88>; // 4 x f16 vector value
-def v8f16 : ValueType<128, 89>; // 8 x f16 vector value
-def v1f32 : ValueType<32 , 90>; // 1 x f32 vector value
-def v2f32 : ValueType<64 , 91>; // 2 x f32 vector value
-def v3f32 : ValueType<96 , 92>; // 3 x f32 vector value
-def v4f32 : ValueType<128, 93>; // 4 x f32 vector value
-def v5f32 : ValueType<160, 94>; // 5 x f32 vector value
-def v8f32 : ValueType<256, 95>; // 8 x f32 vector value
-def v16f32 : ValueType<512, 96>; // 16 x f32 vector value
-def v1f64 : ValueType<64, 97>; // 1 x f64 vector value
-def v2f64 : ValueType<128, 98>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 99>; // 4 x f64 vector value
-def v8f64 : ValueType<512,100>; // 8 x f64 vector value
-
-def nxv2f16 : ValueType<32 , 101>; // n x 2 x f16 vector value
-def nxv4f16 : ValueType<64 , 102>; // n x 4 x f16 vector value
-def nxv8f16 : ValueType<128, 103>; // n x 8 x f16 vector value
-def nxv1f32 : ValueType<32 , 104>; // n x 1 x f32 vector value
-def nxv2f32 : ValueType<64 , 105>; // n x 2 x f32 vector value
-def nxv4f32 : ValueType<128, 106>; // n x 4 x f32 vector value
-def nxv8f32 : ValueType<256, 107>; // n x 8 x f32 vector value
-def nxv16f32 : ValueType<512, 108>; // n x 16 x f32 vector value
-def nxv1f64 : ValueType<64, 109>; // n x 1 x f64 vector value
-def nxv2f64 : ValueType<128, 110>; // n x 2 x f64 vector value
-def nxv4f64 : ValueType<256, 111>; // n x 4 x f64 vector value
-def nxv8f64 : ValueType<512, 112>; // n x 8 x f64 vector value
-
-def x86mmx : ValueType<64 , 113>; // X86 MMX value
-def FlagVT : ValueType<0 , 114>; // Pre-RA sched glue
-def isVoid : ValueType<0 , 115>; // Produces no value
-def untyped: ValueType<8 , 116>; // Produces an untyped value
-def ExceptRef: ValueType<0, 117>; // WebAssembly's except_ref type
+def v1i32 : ValueType<32 , 41>; // 1 x i32 vector value
+def v2i32 : ValueType<64 , 42>; // 2 x i32 vector value
+def v3i32 : ValueType<96 , 43>; // 3 x i32 vector value
+def v4i32 : ValueType<128, 44>; // 4 x i32 vector value
+def v5i32 : ValueType<160, 45>; // 5 x i32 vector value
+def v8i32 : ValueType<256, 46>; // 8 x i32 vector value
+def v16i32 : ValueType<512, 47>; // 16 x i32 vector value
+def v32i32 : ValueType<1024,48>; // 32 x i32 vector value
+def v64i32 : ValueType<2048,49>; // 64 x i32 vector value
+def v128i32 : ValueType<4096,50>; // 128 x i32 vector value
+def v256i32 : ValueType<8182,51>; // 256 x i32 vector value
+def v512i32 : ValueType<16384,52>; // 512 x i32 vector value
+def v1024i32 : ValueType<32768,53>; // 1024 x i32 vector value
+def v2048i32 : ValueType<65536,54>; // 2048 x i32 vector value
+
+def v1i64 : ValueType<64 , 55>; // 1 x i64 vector value
+def v2i64 : ValueType<128, 56>; // 2 x i64 vector value
+def v4i64 : ValueType<256, 57>; // 4 x i64 vector value
+def v8i64 : ValueType<512, 58>; // 8 x i64 vector value
+def v16i64 : ValueType<1024,59>; // 16 x i64 vector value
+def v32i64 : ValueType<2048,60>; // 32 x i64 vector value
+
+def v1i128 : ValueType<128, 61>; // 1 x i128 vector value
+
+def nxv1i1 : ValueType<1, 62>; // n x 1 x i1 vector value
+def nxv2i1 : ValueType<2, 63>; // n x 2 x i1 vector value
+def nxv4i1 : ValueType<4, 64>; // n x 4 x i1 vector value
+def nxv8i1 : ValueType<8, 65>; // n x 8 x i1 vector value
+def nxv16i1 : ValueType<16, 66>; // n x 16 x i1 vector value
+def nxv32i1 : ValueType<32, 67>; // n x 32 x i1 vector value
+
+def nxv1i8 : ValueType<8, 68>; // n x 1 x i8 vector value
+def nxv2i8 : ValueType<16, 69>; // n x 2 x i8 vector value
+def nxv4i8 : ValueType<32, 70>; // n x 4 x i8 vector value
+def nxv8i8 : ValueType<64, 71>; // n x 8 x i8 vector value
+def nxv16i8 : ValueType<128, 72>; // n x 16 x i8 vector value
+def nxv32i8 : ValueType<256, 73>; // n x 32 x i8 vector value
+
+def nxv1i16 : ValueType<16, 74>; // n x 1 x i16 vector value
+def nxv2i16 : ValueType<32, 75>; // n x 2 x i16 vector value
+def nxv4i16 : ValueType<64, 76>; // n x 4 x i16 vector value
+def nxv8i16 : ValueType<128, 77>; // n x 8 x i16 vector value
+def nxv16i16: ValueType<256, 78>; // n x 16 x i16 vector value
+def nxv32i16: ValueType<512, 79>; // n x 32 x i16 vector value
+
+def nxv1i32 : ValueType<32, 80>; // n x 1 x i32 vector value
+def nxv2i32 : ValueType<64, 81>; // n x 2 x i32 vector value
+def nxv4i32 : ValueType<128, 82>; // n x 4 x i32 vector value
+def nxv8i32 : ValueType<256, 83>; // n x 8 x i32 vector value
+def nxv16i32: ValueType<512, 84>; // n x 16 x i32 vector value
+def nxv32i32: ValueType<1024,85>; // n x 32 x i32 vector value
+
+def nxv1i64 : ValueType<64, 86>; // n x 1 x i64 vector value
+def nxv2i64 : ValueType<128, 87>; // n x 2 x i64 vector value
+def nxv4i64 : ValueType<256, 88>; // n x 4 x i64 vector value
+def nxv8i64 : ValueType<512, 89>; // n x 8 x i64 vector value
+def nxv16i64: ValueType<1024,90>; // n x 16 x i64 vector value
+def nxv32i64: ValueType<2048,91>; // n x 32 x i64 vector value
+
+def v2f16 : ValueType<32 , 92>; // 2 x f16 vector value
+def v4f16 : ValueType<64 , 93>; // 4 x f16 vector value
+def v8f16 : ValueType<128, 94>; // 8 x f16 vector value
+def v1f32 : ValueType<32 , 95>; // 1 x f32 vector value
+def v2f32 : ValueType<64 , 96>; // 2 x f32 vector value
+def v3f32 : ValueType<96 , 97>; // 3 x f32 vector value
+def v4f32 : ValueType<128, 98>; // 4 x f32 vector value
+def v5f32 : ValueType<160, 99>; // 5 x f32 vector value
+def v8f32 : ValueType<256, 100>; // 8 x f32 vector value
+def v16f32 : ValueType<512, 101>; // 16 x f32 vector value
+def v32f32 : ValueType<1024, 102>; // 32 x f32 vector value
+def v64f32 : ValueType<2048, 103>; // 64 x f32 vector value
+def v128f32 : ValueType<4096, 104>; // 128 x f32 vector value
+def v256f32 : ValueType<8182, 105>; // 256 x f32 vector value
+def v512f32 : ValueType<16384, 106>; // 512 x f32 vector value
+def v1024f32 : ValueType<32768, 107>; // 1024 x f32 vector value
+def v2048f32 : ValueType<65536, 108>; // 2048 x f32 vector value
+def v1f64 : ValueType<64, 109>; // 1 x f64 vector value
+def v2f64 : ValueType<128, 110>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 111>; // 4 x f64 vector value
+def v8f64 : ValueType<512, 112>; // 8 x f64 vector value
+
+def nxv2f16 : ValueType<32 , 113>; // n x 2 x f16 vector value
+def nxv4f16 : ValueType<64 , 114>; // n x 4 x f16 vector value
+def nxv8f16 : ValueType<128, 115>; // n x 8 x f16 vector value
+def nxv1f32 : ValueType<32 , 116>; // n x 1 x f32 vector value
+def nxv2f32 : ValueType<64 , 117>; // n x 2 x f32 vector value
+def nxv4f32 : ValueType<128, 118>; // n x 4 x f32 vector value
+def nxv8f32 : ValueType<256, 119>; // n x 8 x f32 vector value
+def nxv16f32 : ValueType<512, 120>; // n x 16 x f32 vector value
+def nxv1f64 : ValueType<64, 121>; // n x 1 x f64 vector value
+def nxv2f64 : ValueType<128, 122>; // n x 2 x f64 vector value
+def nxv4f64 : ValueType<256, 123>; // n x 4 x f64 vector value
+def nxv8f64 : ValueType<512, 124>; // n x 8 x f64 vector value
+
+def x86mmx : ValueType<64 , 125>; // X86 MMX value
+def FlagVT : ValueType<0 , 126>; // Pre-RA sched glue
+def isVoid : ValueType<0 , 127>; // Produces no value
+def untyped: ValueType<8 , 128>; // Produces an untyped value
+def ExceptRef: ValueType<0, 129>; // WebAssembly's except_ref type
def token : ValueType<0 , 248>; // TokenTy
def MetadataVT: ValueType<0, 249>; // Metadata
Modified: llvm/trunk/include/llvm/Support/MachineValueType.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/MachineValueType.h?rev=365274&r1=365273&r2=365274&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/MachineValueType.h (original)
+++ llvm/trunk/include/llvm/Support/MachineValueType.h Sat Jul 6 21:47:37 2019
@@ -86,60 +86,65 @@ namespace llvm {
v64i16 = 39, // 64 x i16
v128i16 = 40, //128 x i16
- v1i32 = 41, // 1 x i32
- v2i32 = 42, // 2 x i32
- v3i32 = 43, // 3 x i32
- v4i32 = 44, // 4 x i32
- v5i32 = 45, // 5 x i32
- v8i32 = 46, // 8 x i32
- v16i32 = 47, // 16 x i32
- v32i32 = 48, // 32 x i32
- v64i32 = 49, // 64 x i32
-
- v1i64 = 50, // 1 x i64
- v2i64 = 51, // 2 x i64
- v4i64 = 52, // 4 x i64
- v8i64 = 53, // 8 x i64
- v16i64 = 54, // 16 x i64
- v32i64 = 55, // 32 x i64
+ v1i32 = 41, // 1 x i32
+ v2i32 = 42, // 2 x i32
+ v3i32 = 43, // 3 x i32
+ v4i32 = 44, // 4 x i32
+ v5i32 = 45, // 5 x i32
+ v8i32 = 46, // 8 x i32
+ v16i32 = 47, // 16 x i32
+ v32i32 = 48, // 32 x i32
+ v64i32 = 49, // 64 x i32
+ v128i32 = 50, // 128 x i32
+ v256i32 = 51, // 256 x i32
+ v512i32 = 52, // 512 x i32
+ v1024i32 = 53, // 1024 x i32
+ v2048i32 = 54, // 2048 x i32
+
+ v1i64 = 55, // 1 x i64
+ v2i64 = 56, // 2 x i64
+ v4i64 = 57, // 4 x i64
+ v8i64 = 58, // 8 x i64
+ v16i64 = 59, // 16 x i64
+ v32i64 = 60, // 32 x i64
- v1i128 = 56, // 1 x i128
+ v1i128 = 61, // 1 x i128
// Scalable integer types
- nxv1i1 = 57, // n x 1 x i1
- nxv2i1 = 58, // n x 2 x i1
- nxv4i1 = 59, // n x 4 x i1
- nxv8i1 = 60, // n x 8 x i1
- nxv16i1 = 61, // n x 16 x i1
- nxv32i1 = 62, // n x 32 x i1
-
- nxv1i8 = 63, // n x 1 x i8
- nxv2i8 = 64, // n x 2 x i8
- nxv4i8 = 65, // n x 4 x i8
- nxv8i8 = 66, // n x 8 x i8
- nxv16i8 = 67, // n x 16 x i8
- nxv32i8 = 68, // n x 32 x i8
-
- nxv1i16 = 69, // n x 1 x i16
- nxv2i16 = 70, // n x 2 x i16
- nxv4i16 = 71, // n x 4 x i16
- nxv8i16 = 72, // n x 8 x i16
- nxv16i16 = 73, // n x 16 x i16
- nxv32i16 = 74, // n x 32 x i16
-
- nxv1i32 = 75, // n x 1 x i32
- nxv2i32 = 76, // n x 2 x i32
- nxv4i32 = 77, // n x 4 x i32
- nxv8i32 = 78, // n x 8 x i32
- nxv16i32 = 79, // n x 16 x i32
- nxv32i32 = 80, // n x 32 x i32
-
- nxv1i64 = 81, // n x 1 x i64
- nxv2i64 = 82, // n x 2 x i64
- nxv4i64 = 83, // n x 4 x i64
- nxv8i64 = 84, // n x 8 x i64
- nxv16i64 = 85, // n x 16 x i64
- nxv32i64 = 86, // n x 32 x i64
+ nxv1i1 = 62, // n x 1 x i1
+ nxv2i1 = 63, // n x 2 x i1
+ nxv4i1 = 64, // n x 4 x i1
+ nxv8i1 = 65, // n x 8 x i1
+ nxv16i1 = 66, // n x 16 x i1
+ nxv32i1 = 67, // n x 32 x i1
+
+ nxv1i8 = 68, // n x 1 x i8
+ nxv2i8 = 69, // n x 2 x i8
+ nxv4i8 = 70, // n x 4 x i8
+ nxv8i8 = 71, // n x 8 x i8
+ nxv16i8 = 72, // n x 16 x i8
+ nxv32i8 = 73, // n x 32 x i8
+
+ nxv1i16 = 74, // n x 1 x i16
+ nxv2i16 = 75, // n x 2 x i16
+ nxv4i16 = 76, // n x 4 x i16
+ nxv8i16 = 77, // n x 8 x i16
+ nxv16i16 = 78, // n x 16 x i16
+ nxv32i16 = 79, // n x 32 x i16
+
+ nxv1i32 = 80, // n x 1 x i32
+ nxv2i32 = 81, // n x 2 x i32
+ nxv4i32 = 82, // n x 4 x i32
+ nxv8i32 = 83, // n x 8 x i32
+ nxv16i32 = 84, // n x 16 x i32
+ nxv32i32 = 85, // n x 32 x i32
+
+ nxv1i64 = 86, // n x 1 x i64
+ nxv2i64 = 87, // n x 2 x i64
+ nxv4i64 = 88, // n x 4 x i64
+ nxv8i64 = 89, // n x 8 x i64
+ nxv16i64 = 90, // n x 16 x i64
+ nxv32i64 = 91, // n x 32 x i64
FIRST_INTEGER_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_VECTOR_VALUETYPE = nxv32i64,
@@ -147,33 +152,40 @@ namespace llvm {
FIRST_INTEGER_SCALABLE_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VALUETYPE = nxv32i64,
- v2f16 = 87, // 2 x f16
- v4f16 = 88, // 4 x f16
- v8f16 = 89, // 8 x f16
- v1f32 = 90, // 1 x f32
- v2f32 = 91, // 2 x f32
- v3f32 = 92, // 3 x f32
- v4f32 = 93, // 4 x f32
- v5f32 = 94, // 5 x f32
- v8f32 = 95, // 8 x f32
- v16f32 = 96, // 16 x f32
- v1f64 = 97, // 1 x f64
- v2f64 = 98, // 2 x f64
- v4f64 = 99, // 4 x f64
- v8f64 = 100, // 8 x f64
-
- nxv2f16 = 101, // n x 2 x f16
- nxv4f16 = 102, // n x 4 x f16
- nxv8f16 = 103, // n x 8 x f16
- nxv1f32 = 104, // n x 1 x f32
- nxv2f32 = 105, // n x 2 x f32
- nxv4f32 = 106, // n x 4 x f32
- nxv8f32 = 107, // n x 8 x f32
- nxv16f32 = 108, // n x 16 x f32
- nxv1f64 = 109, // n x 1 x f64
- nxv2f64 = 110, // n x 2 x f64
- nxv4f64 = 111, // n x 4 x f64
- nxv8f64 = 112, // n x 8 x f64
+ v2f16 = 92, // 2 x f16
+ v4f16 = 93, // 4 x f16
+ v8f16 = 94, // 8 x f16
+ v1f32 = 95, // 1 x f32
+ v2f32 = 96, // 2 x f32
+ v3f32 = 97, // 3 x f32
+ v4f32 = 98, // 4 x f32
+ v5f32 = 99, // 5 x f32
+ v8f32 = 100, // 8 x f32
+ v16f32 = 101, // 16 x f32
+ v32f32 = 102, // 32 x f32
+ v64f32 = 103, // 64 x f32
+ v128f32 = 104, // 128 x f32
+ v256f32 = 105, // 256 x f32
+ v512f32 = 106, // 512 x f32
+ v1024f32 = 107, // 1024 x f32
+ v2048f32 = 108, // 2048 x f32
+ v1f64 = 109, // 1 x f64
+ v2f64 = 110, // 2 x f64
+ v4f64 = 111, // 4 x f64
+ v8f64 = 112, // 8 x f64
+
+ nxv2f16 = 113, // n x 2 x f16
+ nxv4f16 = 114, // n x 4 x f16
+ nxv8f16 = 115, // n x 8 x f16
+ nxv1f32 = 116, // n x 1 x f32
+ nxv2f32 = 117, // n x 2 x f32
+ nxv4f32 = 118, // n x 4 x f32
+ nxv8f32 = 119, // n x 8 x f32
+ nxv16f32 = 120, // n x 16 x f32
+ nxv1f64 = 121, // n x 1 x f64
+ nxv2f64 = 122, // n x 2 x f64
+ nxv4f64 = 123, // n x 4 x f64
+ nxv8f64 = 124, // n x 8 x f64
FIRST_FP_VECTOR_VALUETYPE = v2f16,
LAST_FP_VECTOR_VALUETYPE = nxv8f64,
@@ -184,25 +196,25 @@ namespace llvm {
FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64,
- x86mmx = 113, // This is an X86 MMX value
+ x86mmx = 125, // This is an X86 MMX value
- Glue = 114, // This glues nodes together during pre-RA sched
+ Glue = 126, // This glues nodes together during pre-RA sched
- isVoid = 115, // This has no value
+ isVoid = 127, // This has no value
- Untyped = 116, // This value takes a register, but has
+ Untyped = 128, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
- ExceptRef = 117, // WebAssembly's except_ref type
+ ExceptRef = 129, // WebAssembly's except_ref type
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
- LAST_VALUETYPE = 118, // This always remains at the end of the list.
+ LAST_VALUETYPE = 130, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
// This value must be a multiple of 32.
- MAX_ALLOWED_VALUETYPE = 128,
+ MAX_ALLOWED_VALUETYPE = 160,
// A value of type llvm::TokenTy
token = 248,
@@ -474,6 +486,11 @@ namespace llvm {
case v16i32:
case v32i32:
case v64i32:
+ case v128i32:
+ case v256i32:
+ case v512i32:
+ case v1024i32:
+ case v2048i32:
case nxv1i32:
case nxv2i32:
case nxv4i32:
@@ -506,6 +523,13 @@ namespace llvm {
case v5f32:
case v8f32:
case v16f32:
+ case v32f32:
+ case v64f32:
+ case v128f32:
+ case v256f32:
+ case v512f32:
+ case v1024f32:
+ case v2048f32:
case nxv1f32:
case nxv2f32:
case nxv4f32:
@@ -526,21 +550,33 @@ namespace llvm {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
- case v1024i1: return 1024;
- case v512i1: return 512;
- case v256i8: return 256;
+ case v2048i32:
+ case v2048f32: return 2048;
+ case v1024i1:
+ case v1024i32:
+ case v1024f32: return 1024;
+ case v512i1:
+ case v512i32:
+ case v512f32: return 512;
+ case v256i8:
+ case v256i32:
+ case v256f32: return 256;
case v128i1:
case v128i8:
- case v128i16: return 128;
+ case v128i16:
+ case v128i32:
+ case v128f32: return 128;
case v64i1:
case v64i8:
case v64i16:
- case v64i32: return 64;
+ case v64i32:
+ case v64f32: return 64;
case v32i1:
case v32i8:
case v32i16:
case v32i32:
case v32i64:
+ case v32f32:
case nxv32i1:
case nxv32i8:
case nxv32i16:
@@ -756,13 +792,25 @@ namespace llvm {
case v64i16:
case v32i32:
case v16i64:
+ case v32f32:
case nxv32i32:
case nxv16i64: return 1024;
case v256i8:
case v128i16:
case v64i32:
case v32i64:
+ case v64f32:
case nxv32i64: return 2048;
+ case v128i32:
+ case v128f32: return 4096;
+ case v256i32:
+ case v256f32: return 8192;
+ case v512i32:
+ case v512f32: return 16384;
+ case v1024i32:
+ case v1024f32: return 32768;
+ case v2048i32:
+ case v2048f32: return 65536;
case ExceptRef: return 0; // opaque type
}
}
@@ -877,15 +925,20 @@ namespace llvm {
if (NumElements == 128) return MVT::v128i16;
break;
case MVT::i32:
- if (NumElements == 1) return MVT::v1i32;
- if (NumElements == 2) return MVT::v2i32;
- if (NumElements == 3) return MVT::v3i32;
- if (NumElements == 4) return MVT::v4i32;
- if (NumElements == 5) return MVT::v5i32;
- if (NumElements == 8) return MVT::v8i32;
- if (NumElements == 16) return MVT::v16i32;
- if (NumElements == 32) return MVT::v32i32;
- if (NumElements == 64) return MVT::v64i32;
+ if (NumElements == 1) return MVT::v1i32;
+ if (NumElements == 2) return MVT::v2i32;
+ if (NumElements == 3) return MVT::v3i32;
+ if (NumElements == 4) return MVT::v4i32;
+ if (NumElements == 5) return MVT::v5i32;
+ if (NumElements == 8) return MVT::v8i32;
+ if (NumElements == 16) return MVT::v16i32;
+ if (NumElements == 32) return MVT::v32i32;
+ if (NumElements == 64) return MVT::v64i32;
+ if (NumElements == 128) return MVT::v128i32;
+ if (NumElements == 256) return MVT::v256i32;
+ if (NumElements == 512) return MVT::v512i32;
+ if (NumElements == 1024) return MVT::v1024i32;
+ if (NumElements == 2048) return MVT::v2048i32;
break;
case MVT::i64:
if (NumElements == 1) return MVT::v1i64;
@@ -904,13 +957,20 @@ namespace llvm {
if (NumElements == 8) return MVT::v8f16;
break;
case MVT::f32:
- if (NumElements == 1) return MVT::v1f32;
- if (NumElements == 2) return MVT::v2f32;
- if (NumElements == 3) return MVT::v3f32;
- if (NumElements == 4) return MVT::v4f32;
- if (NumElements == 5) return MVT::v5f32;
- if (NumElements == 8) return MVT::v8f32;
- if (NumElements == 16) return MVT::v16f32;
+ if (NumElements == 1) return MVT::v1f32;
+ if (NumElements == 2) return MVT::v2f32;
+ if (NumElements == 3) return MVT::v3f32;
+ if (NumElements == 4) return MVT::v4f32;
+ if (NumElements == 5) return MVT::v5f32;
+ if (NumElements == 8) return MVT::v8f32;
+ if (NumElements == 16) return MVT::v16f32;
+ if (NumElements == 32) return MVT::v32f32;
+ if (NumElements == 64) return MVT::v64f32;
+ if (NumElements == 128) return MVT::v128f32;
+ if (NumElements == 256) return MVT::v256f32;
+ if (NumElements == 512) return MVT::v512f32;
+ if (NumElements == 1024) return MVT::v1024f32;
+ if (NumElements == 2048) return MVT::v2048f32;
break;
case MVT::f64:
if (NumElements == 1) return MVT::v1f64;
Modified: llvm/trunk/lib/CodeGen/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ValueTypes.cpp?rev=365274&r1=365273&r2=365274&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ValueTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/ValueTypes.cpp Sat Jul 6 21:47:37 2019
@@ -172,6 +172,11 @@ std::string EVT::getEVTString() const {
case MVT::v16i32: return "v16i32";
case MVT::v32i32: return "v32i32";
case MVT::v64i32: return "v64i32";
+ case MVT::v128i32: return "v128i32";
+ case MVT::v256i32: return "v256i32";
+ case MVT::v512i32: return "v512i32";
+ case MVT::v1024i32:return "v1024i32";
+ case MVT::v2048i32:return "v2048i32";
case MVT::v1i64: return "v1i64";
case MVT::v2i64: return "v2i64";
case MVT::v4i64: return "v4i64";
@@ -189,6 +194,13 @@ std::string EVT::getEVTString() const {
case MVT::v5f32: return "v5f32";
case MVT::v8f32: return "v8f32";
case MVT::v16f32: return "v16f32";
+ case MVT::v32f32: return "v32f32";
+ case MVT::v64f32: return "v64f32";
+ case MVT::v128f32: return "v128f32";
+ case MVT::v256f32: return "v256f32";
+ case MVT::v512f32: return "v512f32";
+ case MVT::v1024f32:return "v1024f32";
+ case MVT::v2048f32:return "v2048f32";
case MVT::v1f64: return "v1f64";
case MVT::v2f64: return "v2f64";
case MVT::v4f64: return "v4f64";
@@ -257,6 +269,11 @@ Type *EVT::getTypeForEVT(LLVMContext &Co
case MVT::v16i32: return VectorType::get(Type::getInt32Ty(Context), 16);
case MVT::v32i32: return VectorType::get(Type::getInt32Ty(Context), 32);
case MVT::v64i32: return VectorType::get(Type::getInt32Ty(Context), 64);
+ case MVT::v128i32: return VectorType::get(Type::getInt32Ty(Context), 128);
+ case MVT::v256i32: return VectorType::get(Type::getInt32Ty(Context), 256);
+ case MVT::v512i32: return VectorType::get(Type::getInt32Ty(Context), 512);
+ case MVT::v1024i32:return VectorType::get(Type::getInt32Ty(Context), 1024);
+ case MVT::v2048i32:return VectorType::get(Type::getInt32Ty(Context), 2048);
case MVT::v1i64: return VectorType::get(Type::getInt64Ty(Context), 1);
case MVT::v2i64: return VectorType::get(Type::getInt64Ty(Context), 2);
case MVT::v4i64: return VectorType::get(Type::getInt64Ty(Context), 4);
@@ -273,7 +290,14 @@ Type *EVT::getTypeForEVT(LLVMContext &Co
case MVT::v4f32: return VectorType::get(Type::getFloatTy(Context), 4);
case MVT::v5f32: return VectorType::get(Type::getFloatTy(Context), 5);
case MVT::v8f32: return VectorType::get(Type::getFloatTy(Context), 8);
- case MVT::v16f32: return VectorType::get(Type::getFloatTy(Context), 16);
+ case MVT::v16f32: return VectorType::get(Type::getFloatTy(Context), 16);
+ case MVT::v32f32: return VectorType::get(Type::getFloatTy(Context), 32);
+ case MVT::v64f32: return VectorType::get(Type::getFloatTy(Context), 64);
+ case MVT::v128f32: return VectorType::get(Type::getFloatTy(Context), 128);
+ case MVT::v256f32: return VectorType::get(Type::getFloatTy(Context), 256);
+ case MVT::v512f32: return VectorType::get(Type::getFloatTy(Context), 512);
+ case MVT::v1024f32:return VectorType::get(Type::getFloatTy(Context), 1024);
+ case MVT::v2048f32:return VectorType::get(Type::getFloatTy(Context), 2048);
case MVT::v1f64: return VectorType::get(Type::getDoubleTy(Context), 1);
case MVT::v2f64: return VectorType::get(Type::getDoubleTy(Context), 2);
case MVT::v4f64: return VectorType::get(Type::getDoubleTy(Context), 4);
Modified: llvm/trunk/test/TableGen/intrinsic-varargs.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/intrinsic-varargs.td?rev=365274&r1=365273&r2=365274&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/intrinsic-varargs.td (original)
+++ llvm/trunk/test/TableGen/intrinsic-varargs.td Sat Jul 6 21:47:37 2019
@@ -25,7 +25,7 @@ class Intrinsic<string name, list<LLVMTy
}
// isVoid needs to match the definition in ValueTypes.td
-def isVoid : ValueType<0, 115>; // Produces no value
+def isVoid : ValueType<0, 127>; // Produces no value
def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
// CHECK: /* 0 */ 0, 29, 0,
Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=365274&r1=365273&r2=365274&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Sat Jul 6 21:47:37 2019
@@ -113,6 +113,11 @@ StringRef llvm::getEnumName(MVT::SimpleV
case MVT::v16i32: return "MVT::v16i32";
case MVT::v32i32: return "MVT::v32i32";
case MVT::v64i32: return "MVT::v64i32";
+ case MVT::v128i32: return "MVT::v128i32";
+ case MVT::v256i32: return "MVT::v256i32";
+ case MVT::v512i32: return "MVT::v512i32";
+ case MVT::v1024i32: return "MVT::v1024i32";
+ case MVT::v2048i32: return "MVT::v2048i32";
case MVT::v1i64: return "MVT::v1i64";
case MVT::v2i64: return "MVT::v2i64";
case MVT::v4i64: return "MVT::v4i64";
@@ -130,6 +135,13 @@ StringRef llvm::getEnumName(MVT::SimpleV
case MVT::v5f32: return "MVT::v5f32";
case MVT::v8f32: return "MVT::v8f32";
case MVT::v16f32: return "MVT::v16f32";
+ case MVT::v32f32: return "MVT::v32f32";
+ case MVT::v64f32: return "MVT::v64f32";
+ case MVT::v128f32: return "MVT::v128f32";
+ case MVT::v256f32: return "MVT::v256f32";
+ case MVT::v512f32: return "MVT::v512f32";
+ case MVT::v1024f32: return "MVT::v1024f32";
+ case MVT::v2048f32: return "MVT::v2048f32";
case MVT::v1f64: return "MVT::v1f64";
case MVT::v2f64: return "MVT::v2f64";
case MVT::v4f64: return "MVT::v4f64";
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