[llvm] r365271 - [X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat Jul  6 11:46:09 2019
New Revision: 365271

URL: http://llvm.org/viewvc/llvm-project?rev=365271&view=rev
Log:
[X86] SimplifyDemandedVectorEltsForTargetNode - fix shadow variable warning. NFCI.

Fixes cppcheck warning.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=365271&r1=365270&r2=365271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Jul  6 11:46:09 2019
@@ -33908,9 +33908,9 @@ bool X86TargetLowering::SimplifyDemanded
     // If we reuse the shift amount just for sse shift amounts then we know that
     // only the bottom 64-bits are only ever used.
     bool AssumeSingleUse = llvm::all_of(Amt->uses(), [&Amt](SDNode *Use) {
-      unsigned Opc = Use->getOpcode();
-      return (Opc == X86ISD::VSHL || Opc == X86ISD::VSRL ||
-              Opc == X86ISD::VSRA) &&
+      unsigned UseOpc = Use->getOpcode();
+      return (UseOpc == X86ISD::VSHL || UseOpc == X86ISD::VSRL ||
+              UseOpc == X86ISD::VSRA) &&
              Use->getOperand(0) != Amt;
     });