[PATCH] D64190: [DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo.
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Thu Jul 4 11:19:50 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL365149: [DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y… (authored by ctopper, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D64190?vs=207961&id=208060#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64190/new/
https://reviews.llvm.org/D64190
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/test/CodeGen/X86/add-of-carry.ll
Index: llvm/trunk/test/CodeGen/X86/add-of-carry.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/add-of-carry.ll
+++ llvm/trunk/test/CodeGen/X86/add-of-carry.ll
@@ -9,11 +9,9 @@
define i32 @test1(i32 %sum, i32 %x) nounwind readnone ssp {
; CHECK-LABEL: test1:
; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl %eax, %edx
-; CHECK-NEXT: addl %ecx, %edx
-; CHECK-NEXT: adcl %ecx, %eax
+; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: adcl $0, %eax
; CHECK-NEXT: retl
%add4 = add i32 %x, %sum
%cmp = icmp ult i32 %add4, %x
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2966,8 +2966,11 @@
SDNode *N) {
// Iff the flag result is dead:
// (addcarry (add|uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry)
+ // Don't do this if the Carry comes from the uaddo. It won't remove the uaddo
+ // or the dependency between the instructions.
if ((N0.getOpcode() == ISD::ADD ||
- (N0.getOpcode() == ISD::UADDO && N0.getResNo() == 0)) &&
+ (N0.getOpcode() == ISD::UADDO && N0.getResNo() == 0 &&
+ N0.getValue(1) != CarryIn)) &&
isNullConstant(N1) && !N->hasAnyUseOfValue(1))
return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(),
N0.getOperand(0), N0.getOperand(1), CarryIn);
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