[PATCH] D64207: [AMDGPU] DPP combiner: recognize identities for more opcodes

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

In D64207#1570456 <https://reviews.llvm.org/D64207#1570456>, @vpykhtin wrote:

> I think modifiers are checked correctly by the existing code, but can you add a test for e64 encodings into dpp_combine.mir similar to what is under "check for floating point modifiers" comment?


I'm trying but I don't know enough about Machine IR. A typical e64 instruction from my dumps is:

  %20:vgpr_32 = V_ADD_U32_e64 %18:vgpr_32, killed %19:vgpr_32, 0, implicit $exec

but I don't know what the third operand (the 0) means or what other values it can take.


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https://reviews.llvm.org/D64207