[PATCH] D61289: [globalisel] Add G_SEXT_INREG

Wed Jul 3 13:00:44 PDT 2019

arsenm added inline comments.

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Comment at: llvm/include/llvm/Target/GenericOpcodes.td:46
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src, untyped_imm_0:$sz);
+  let hasSideEffects = 0;
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dsanders wrote:
> arsenm wrote:
> > dsanders wrote:
> > > arsenm wrote:
> > > > Are tablegen emitter changes needed for this? I was trying to add an immediate operand in D64054, which seemed to not work correctly
> > > You mean the untyped_imm_0? It's needed to drive the verifier that Diana requested and tells it which immediate checks it needs to look for
> > Yes. As far as I can tell the emitter will try looking for G_CONSTANT defined register for this. I agree there should be a special immediate operand for this, but I don't think this will work in a tablegen pattern as-is. The current form has a ValueType leaf, so matching the immediate wouldn't be quite the same.
> I'm not sure I'm following. InOperandList in a GenericInstruction specifies the type constraints and uses special TypeOperand subclasses. They don't factor into tablegen patterns except in so far as requiring that types match.
I mean I believe there's no way to define a node that will be capable of matching this instruction

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  https://reviews.llvm.org/D61289/new/

https://reviews.llvm.org/D61289